Publié il y a 11 mois
Digital - Digital Design Engineer (title will reflect experience)
@ Eliyan
Canada
En bref
Eliyan, an early-stage chiplet startup, is hiring a full-time digital design engineer to develop micro-architecture specifications and RTL for PHYs and controllers. The role covers Ethernet PCS/PMA IP design, verification support and physical design collaboration. The posting requires working onsite Monday to Friday.
Responsabilités :
- Design and integrate Ethernet PCS/PMA IPs for 100G to 800G
- Develop micro-architecture specifications and SystemVerilog RTL
- Ensure compliance with IEEE 802.3 Ethernet standards
- Optimize designs for power, area and performance
- Collaborate with verification and physical design teams
Résumé des exigences :
- Degree in electrical engineering or related field
- 5+ years of high-speed digital design experience
- Strong SystemVerilog RTL and assertion coding
- Knowledge of IEEE 802.3 Ethernet clauses
- Experience in a start-up environment
Outils et compétences
Source et dates
Site carrière / système de candidatures · lever
- Date publiée par l’employeur
- 2025-12-18
- Première détection par notre source
- 2026-10-08
- Mise à jour du dossier source
- 2026-10-09
Ces dates décrivent le dossier source, pas une vérification en direct du recrutement. Consultez l’offre originale.
Détails du poste
| Niveau | Senior |
| Domaine | Développement logiciel |
| Expérience | 5 an(s) et plus |
| Heures par semaine | 40 (estimé) |
| Horaire | jour |
| Déplacements | avion : aucun · route : aucun |
| Milieu de travail | Bureau |
| Position | Surtout assis |
| Exigences physiques | physique faible · ordinateur élevé |
| Langues | English |
| Formation | Baccalauréat (exigé), Maîtrise (préféré), Doctorat (préféré) |
| Domaines d’études | Electrical Engineering |
Résumé et détails rédigés par l’IA à partir de l’offre; l’offre de l’employeur fait foi.
Eliyan
Profil d’entreprise sauvegardé
Renseignements historiques provenant d’un profil The Jobs API sauvegardé (champs LinkedIn/Crunchbase). Ils ne sont pas vérifiés en temps réel; les chiffres peuvent avoir changé. Les valeurs manquantes restent inconnues.
Accelerating a Smarter Future by Revolutionizing Chiplet-based Systems
Description complète de l’entreprise
Eliyan's mission is to revolutionize chiplet connectivity technologies by challenging the status quo to unleash the ultimate performance of smart systems of the future.
- Abonnés LinkedIn
- 5 761
- Personnes associées sur LinkedIn
- 82
- Bureaux déclarés
- Santa Clara, US
- Catégories d’activité
- Electronics
- Semiconductor
- Manufacturing
- Autres noms enregistrés
- Eliyan
- Eliyan Corporation
- Le profil indique une agence de recrutement
- Non
- Investissement total déclaré
- 150 000 000
La devise et la date d’observation ne sont pas fournies; ce n’est ni une valorisation actuelle ni une ronde de financement.
Eliyan's mission is to revolutionize chiplet connectivity technologies by challenging the status quo to unleash the ultimate performance of smart systems of the future.
| Champ | Valeur |
|---|---|
| Secteur | Semiconductor Manufacturing |
| Taille | 11-50 employees |
| Siège social | Santa Clara |
| Type d’organisation | Privately Held |
| Fondée en | 2021 |
| Offres sur Jobsy | 5 |
| Voir la page |
Join the leading chiplet startup! As an Eliyan digital designer, you will be working at a fast-paced early-stage startup creating technologies that fuel tomorrow’s chiplet based systems with best-in-class power, area, manufacturability, and design flexibility. You will be developing micro-architecture specifications and RTL design descriptions for best-in-class PHYs and Controllers. You will work with a cross-functional team of experts that operate from first principles, innovate and push the envelope to create high-volume and high-performance manufacturable products. We offer a fun work environment with excellent benefits. MUST BE WILLING TO WORK ONSITE - M-F
Key Responsibilities
- Design, develop and/or integrate Ethernet PCS/PMA IPs for various data rates (100/200/400/800G)
- Develop micro-architecture specifications and implement digital designs using SystemVerilog
- Ensure compliance with Ethernet standards (IEEE 802.3)
- Optimize designs for power, area, and performance
- Collaborate with verification engineers for IP verification
- Work closely with physical design team for physical implementation
- Participate in design reviews and ensure design quality
- Develop and maintain all IP design collaterals that include documentation, RTL, SDC constraints, power intent definition (UPF/CPF), LINT/CDC rule files and waivers
- Stay up to date with industry trends, emerging technologies and progress in standards’ bodies
Qualifications
- Bachelors or Masters or Ph.D in Electrical Engineering and related fields, or equivalent
- 5+ years of experience in high-speed digital design (preferably in retimer, gearbox, Ethernet PMA/PCS logic)
- Strong expertise in RTL and Assertion coding with SystemVerilog
- Proficiency in taking RTL through synthesis and produce a PPA optimized frontend netlist
- Knowledge of Ethernet 802.3 standards’ clauses related to 100G/200G/400G/800G, Auto-Negotiation and Link Training
- Strong bias for innovations across all aspects of digital design including automation of mundane activities and methods for quality improvement
- Experience integrating 3rd party mixed signal IPs
- Proven track record of being part of a start-up like environment
- Knowledge of DRAM Controllers/PHYs and HBM Memory a plus
Journal
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