Publié il y a 23 jours
Hardware Engineer
@ NUVACORE
Markham, Ontario
En bref
NUVACORE is hiring a Hardware Board Design Engineer to lead the design of high-density server motherboards, baseboards and riser cards for AI and data center CPUs. The role covers schematic capture, component selection, PCB layout oversight, lab bring-up and manufacturing support. It is a full-time position.
Responsabilités :
- Lead design of multi-layer HDI server motherboards and riser cards
- Own schematic capture and component selection
- Oversee PCB layout with layout engineers
- Design high-current power delivery and VRMs
- Lead hardware bring-up and debugging in the lab
Résumé des exigences :
- Bachelor's in electrical, computer engineering, or related field
- 5+ years high-speed board design experience
- Proficiency with Cadence Allegro, OrCAD, or Altium
- Experience with PCIe, DDR, or USB interfaces
- Proven power distribution and multiphase VRM design
- Strong hands-on lab debugging skills
Outils et compétences
Source et dates
Site carrière / système de candidatures · lever
- Date publiée par l’employeur
- 2026-10-14
- Première détection par notre source
- 2026-10-16
- Mise à jour du dossier source
- 2026-10-26
Ces dates décrivent le dossier source, pas une vérification en direct du recrutement. Consultez l’offre originale.
Détails du poste
| Niveau | Senior |
| Domaine | Génie |
| Expérience | 5 an(s) et plus |
| Heures par semaine | 40 (estimé) |
| Milieu de travail | Laboratoire, Bureau |
| Position | Assis et debout |
| Exigences physiques | physique faible · ordinateur élevé |
| Langues | English |
| Formation | Baccalauréat (exigé), Maîtrise (préféré) |
| Domaines d’études | Electrical Engineering, Computer Engineering |
Résumé et détails rédigés par l’IA à partir de l’offre; l’offre de l’employeur fait foi.
NUVACORE
Profil d’entreprise sauvegardé
Renseignements historiques provenant d’un profil The Jobs API sauvegardé (champs LinkedIn/Crunchbase). Ils ne sont pas vérifiés en temps réel; les chiffres peuvent avoir changé. Les valeurs manquantes restent inconnues.
NUVACORE is building a new class of CPU for the AI era, designed for maximum performance, efficiency, and scale.
Description complète de l’entreprise
Maximum performance. Absolute area efficiency. No compromise. A general-purpose CPU core designed to excel everywhere—from core infrastructure to advanced AI systems, including the continuous demands of agentic computing. This is not iteration, it is a complete rewrite of the rules of silicon.
- Abonnés LinkedIn
- 5 838
- Personnes associées sur LinkedIn
- 82
- Bureaux déclarés
- 5201 Great America Pkwy, Suite 215, San Jose, California 95054, US
- 5001 Plaza on the Lk, Suite 320, Austin, TX 78746, US
- 125 Commerce Valley Dr W, Suite 600, Markham, Ontario L3T 7W4, CA
- Autres noms enregistrés
- NUVACORE
- Le profil indique une agence de recrutement
- Non
Maximum performance. Absolute area efficiency. No compromise. A general-purpose CPU core designed to excel everywhere—from core infrastructure to advanced AI systems, including the continuous demands of agentic computing. This is not iteration, it is a complete rewrite of the rules of silicon.
| Champ | Valeur |
|---|---|
| Secteur | Technology, Information and Internet |
| Taille | 51-200 employees |
| Siège social | San Jose, California |
| Type d’organisation | Privately Held |
| Fondée en | 2026 |
| Offres sur Jobsy | 9 |
| Voir la page |
At NUVACORE we're designing a new general-purpose CPU core for the sustained, intensive demands of AI infrastructure and agentic computing, not the workloads of the past. We are seeking a highly skilled and motivated Hardware Board Design Engineer to drive the architecture, design, and development of next-generation, high-performance, and energy-efficient CPU server solutions for data center applications. In this role, you will be responsible for the end-to-end hardware development life cycle, from initial concept and feasibility studies to schematic capture, PCB layout oversight, component selection, and laboratory brings-up. You will collaborate closely with cross-functional teams—including Package Design, Signal/Power Integrity (SI/PI), Thermal/Mechanical Engineering, and Software/Firmware—to deliver robust, scalable, and cutting-edge system platform hardware.
ROLE
- Board-Level Architecture & Design: Lead the design and development of complex, multi-layer, high-density interconnect (HDI) server motherboards, baseboards, and riser cards optimized for data center workloads.
- Schematic Capture & Component Selection: Ownership of schematic entry, creation of complex hierarchical designs, and rigorous component selection prioritizing power efficiency, thermal performance, and long-term reliability.
- Layout Collaboration: Work hand-in-hand with PCB layout engineers to define board stack-ups, routing constraints, component placement, and shielding strategies.
- Cross-Functional Alignment: Collaborate tightly with the Silicon, Package Design, and SI/PI teams to implement optimal co-design methodologies for high-speed interfaces (e.g., PCIe Gen6/Gen7, DDR5/LPDDR6, CXL) and robust power delivery networks (PDN).
- Power & Thermal Management: Design highly efficient, high-current power delivery paths (VRMs, multiphase buck converters) capable of supporting ultra-high-power CPUs while meeting strict data center energy-efficiency metrics.
- Bring-up, Validation, & Debug: Lead the hands-on hardware bring-up, debugging, and validation of prototype boards in the lab using high-speed oscilloscopes, logic analyzers, and specialized test equipment.
- Manufacturing Support: Generate comprehensive fabrication and assembly documentation (Gerbers, BOMs, ODB++). Partner with fabrication houses and EMS partners to resolve DFM/DFA/DFT issues and ensure smooth mass production transitions.
REQUIREMENTS — MUST HAVE
- Education: Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related technical field.
- Experience: 5+ years of professional experience in high-speed hardware board design, ideally focused on enterprise servers, data center hardware, or complex computing platforms.
- EDA Tools: High proficiency in industry-standard schematic capture and PCB layout tools (e.g., Cadence Allegro, Concept HDL, OrCAD, or Altium Designer).
- High-Speed Design Knowledge: Direct experience designing with high-speed serial/parallel interfaces (such as PCIe, DDR/LPDDR, or USB) and understanding basic SI/PI constraints.
- Power Delivery: Proven experience with board-level power distribution design, DC-DC converters, and multi-phase VRMs supporting high-current rails.
- Lab Skills: Strong hands-on laboratory experience with hardware debugging, rework, and using diagnostic equipment (DMMs, scopes, network analyzers).
REQUIREMENTS — NICE TO HAVE
- Education: Master’s degree in Electrical Engineering or Computer Engineering.
- Advanced Data Center Experience: 10+ years deep understanding of data center server architectures, OCP (Open Compute Project) standards, and system topologies (e.g., CPU sockets, high-speed riser configurations, and BMC sub-systems).
- Silicon-Package-Board Co-Design: Familiarity with the interplay between advanced semiconductor packaging (e.g., chiplets, 2.5D bridges) and high-density PCB implementation.
- Simulation & Modeling: Familiarity with SI/PI and thermal simulation concepts using tools such as Ansys (SIwave, HFSS), Cadence Sigrity, or HyperLynx to guide early-stage design constraints.
- Manufacturing Integration: Strong background in optimizing layouts for high-volume manufacturing, minimizing layer counts while maintaining performance, and handling DFX (Design for Manufacturing/Assembly/Test) validation.
- Self-Driven & Collaborative: Excellent communication and cross-functional collaboration skills, with the ability to thrive in a fast-paced, startup-like environment.
The next great CPU won't build itself. We’re assembling a world-class team across every layer of CPU development, from architecture and design to verification, physical implementation, software, infrastructure, and product delivery. Every discipline matters, and every person has the opportunity to help shape the technology from the ground up.
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