IC design Implementation and SignOff Architect, (STA SignOff)

@ Cadence

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Canada

Temps plein15+ ans d’expérience

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SIGNAUX

En bref

Cadence is hiring an IC design implementation and signoff architect to lead customer and partner engagements for its timing signoff portfolio on advanced nodes. The role drives adoption of Cadence signoff and AgenticAI features, works with R&D on tool enhancements, and represents Cadence at industry forums. The posting asks for 15+ years of experience and offers incentive compensation with a salary range of $154,000 to $286,000 for Washington.

Responsabilités :

Lead technical engagements with customers and partners on Cadence signoff tools
Work with design teams to meet customer success metrics on advanced nodes
Drive benchmarks, flow optimizations and timing closure methodologies
Influence tool enhancements with R&D and Product Engineering
Represent Cadence at industry forums and author technical papers

Résumé des exigences :

15+ years of IC design implementation and signoff experience
Deep expertise in advanced node STA and ECOs (3nm and below)
Strong scripting in Tcl, Python and Perl
Proven track record leading technical teams at executive levels
BS or MS in Electrical Engineering, Computer Engineering or related field

Outils et compétences

Tempus Certus QRC

Avantages mentionnés

Soins dentairesSoins de la vueRégime de retraite

Source et dates

Site carrière / système de candidatures · workday

Date publiée par l’employeur: 2026-11-01
Première détection par notre source: 2026-10-14
Mise à jour du dossier source: 2026-11-04

Ces dates décrivent le dossier source, pas une vérification en direct du recrutement. Consultez l’offre originale.

Détails du poste

Niveau	Senior
Domaine	Génie
Expérience	15 an(s) et plus
Heures par semaine	40 (estimé)
Déplacements	avion : modérés
Milieu de travail	Bureau, Chez les clients
Position	Surtout assis
Exigences physiques	physique faible · ordinateur élevé
Langues	English
Candidatures encouragées	Personnes handicapées
Formation	Baccalauréat (exigé), Maîtrise (exigé)
Domaines d’études	Electrical Engineering, Computer Engineering
Avantages mentionnés	Congés payés généreux, Régime de retraite, Prime de rendement, Actions ou participation

Résumé et détails rédigés par l’IA à partir de l’offre; l’offre de l’employeur fait foi.

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Cadence

Toutes ses offres

Champ	Valeur
Offres sur Jobsy	13

Description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Key Responsibilities

Technical Expertise: Lead technical engagements with customers and partners to drive & adoption of Cadence signoff portfolio. Work closely with design teams to meet customer success metrics, guide adoption of Cadence’s timing signoff & closure and AgenticAI features across advanced nodes (5nm and below).
Cross-Functional Collaboration: Partner with R&D and Product Engineering to influence tool enhancements based on real-world customer requirements.
Innovation & Enablement: Drive complex benchmarks, flow optimizations, and deployment of cutting-edge methodologies for timing signoff & closure, STA, IR Drop, and power/timing closure.
Thought Leadership: Represent Cadence at industry forums, author technical papers, and deliver keynote presentations to position Cadence as a market leader.

Requirements

15+ years of experience in IC design implementation and signoff, with demonstrated success in managing large-scale technical programs.
Deep expertise in digital design fundamentals, advanced node STA & ECOs (3nm and below), and EDA tool ecosystems.
Core timing signoff expertise, advanced node STA, UPF & constraints debugging, hierarchical & 3DIC design STA and closure solutions
Proven track record of leading technical teams and driving customer success at executive levels.
Strong proficiency in scripting (Tcl, Python, Perl) and flow customization for design closure.
Excellent communication, negotiation, and leadership skills with the ability to influence internal and external stakeholders.
Prior experience with Cadence tools (Tempus, Certus, QRC) and competitive solutions highly desirable.
BS/MS in Electrical Engineering, Computer Engineering, or related field

The annual salary range for Washington is $154,000 to $286,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure.Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

We welcome applications from candidates with disabilities and in equity seeking groups. If you have accessibility needs during the application and interview process, we encourage you to make your needs known.