Cores Verification Lead

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THE ROLE:

We are looking for an outstanding candidate to provide technical expertise for execution on the functional verification strategy for our next generation microprocessor designs. You will maintain and improve existing functional verification methodology, improve existing infrastructure, and work on related projects and/or assignments as needed to meet team goals. Additionally, you will perform project definition, training and documentation. Finally, you will work with architects and TG/PG RTL/Designers and develop an effective working relationship with parties involved. If this sounds like you, we welcome you to apply!

THE PERSON:

The ideal candidate will have good communication skills and the ability to work with a team with varied strengths. You are highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you.

KEY RESPONSIBILITIES:

• Lead the design, development, and optimization of scalable build infrastructure to significantly reduce model build turnaround times and improve engineering productivity.
• Drive organization-wide build system modernization initiatives, enabling efficient support for Zen8, Zen9, and future CPU core development programs.
• Improve compute resource utilization and LSF farm efficiency through build caching, artifact reuse, and elimination of redundant build processes.
• Architect and implement hyperscale build solutions that enhance performance, reliability, and scalability across AMD's silicon design environments.
• Provide technical leadership and subject matter expertise for the transition from legacy build systems to next-generation build architectures.
• Partner with silicon design, CAD, infrastructure, and software engineering teams to define and execute long-term build and automation strategies.
• Establish best practices, standards, and roadmaps for build infrastructure, continuous integration, and large-scale engineering workflows.

PREFERRED EXPERIENCE:

• Deep expertise in build systems, build orchestration, and large-scale software or silicon development environments.
• Strong experience designing and operating distributed or hyperscale build infrastructure.
• Proven track record improving build performance, reducing turnaround time, and increasing engineering productivity at scale.
• Experience with compute farm scheduling technologies (e.g., LSF or similar workload management platforms).
• Strong understanding of build caching, artifact management, dependency optimization, and build reproducibility techniques.
• Experience supporting semiconductor design workflows, EDA environments, or chip development programs.
• Demonstrated ability to lead complex infrastructure transformation initiatives across multiple engineering organizations.
• Excellent collaboration and communication skills with the ability to influence technical direction across cross-functional teams.
• Experience driving automation, CI/CD, and infrastructure scalability in high-performance engineering environments.

ACADEMIC CREDENTIALS:

• BS or MS with some industry experience desired (all degrees are related to CS or EE).

LOCATION:

Ontario

This role is not eligible for Visa Sponsorship

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Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.