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Publié il y a 9 jours

ASIC Engineer Intern

@ Ciena Canada ULC

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Ottawa, Ontario

25,50–35 $/hTemps plein
Postuler
SIGNAUX

En bref

Ciena Canada ULC is hiring a student ASIC engineer intern for a 4-month work term, extendable to 8, starting January 2027. The intern supports automation infrastructure and ASIC design, layout, integration and verification for DSP ASICs used in optical communications. Pay is $25.50 to $35.00 per hour.

Salaire :

25,50 $–35 $ de l’heure

Responsabilités :

  • Develop automation infrastructure for ASIC devices
  • Implement netlists into silicon-realizable layouts
  • Create constraints and automate ASIC integration
  • Develop reusable SystemVerilog/UVM verification components
  • Enhance Python-based build and debug workflows

Résumé des exigences :

  • Programming experience in Java, Python, TCL, Skill/Ocean or SystemVerilog
  • Familiarity with Linux-based development environments
  • Experience with ASIC or FPGA development (asset)
  • Strong analytical and debugging skills (asset)
  • Familiarity with Agile, JIRA, Confluence and Git (asset)

Outils et compétences

SystemVerilogUVMPythonTCLSkill/OceanJavaLinuxGitJIRAConfluence

Avantages mentionnés

Soins de la vueProgramme d’aideCongés payés
Source et dates

Site carrière / système de candidatures · workday

Date publiée par l’employeur
2026-10-29
Première détection par notre source
2026-10-30
Mise à jour du dossier source
2026-11-02

Ces dates décrivent le dossier source, pas une vérification en direct du recrutement. Consultez l’offre originale.

Détails du poste

NiveauDébutant
DomaineDéveloppement logiciel
Heures par semaine40 (estimé)
Déplacementsavion : aucun · route : aucun
Milieu de travailBureau
PositionSurtout assis
Exigences physiquesphysique faible · ordinateur élevé
LanguesEnglish
Avantages mentionnésCongés payés généreux, Mieux-être

Résumé et détails rédigés par l’IA à partir de l’offre; l’offre de l’employeur fait foi.

Postuler

Ciena Canada ULC

Toutes ses offres
ChampValeur
Offres sur Jobsy75
Description

As the global leader in high-speed connectivity, Ciena builds the critical infrastructure powering the AI era. We’re a technology company shaping the future of networking, guided by innovation, integrity, and collaboration. Through development opportunities, meaningful work, and flexibility, Ciena supports growth and well-being—on and off the job. Connect with a career that matters.


The Opportunity: Work term of 4 months extendable to 8, starting in January 2027.


Ciena is seeking a student to contribute to the development and evolution of automation infrastructure used for next-generation ASIC devices. The role provides exposure to ASIC design, integration, layout, and verification activities within large-scale DSP ASIC development for optical communications. The position is aligned to a student’s experience, strengths, and technical interests.


How you will make an impact:

  • Contribute to the development of automation infrastructure for ASIC devices.
  • Collaborate with developers and team leads to advance ASIC design, layout, integration, and verification activities.
  • Develop design blocks and evaluate designs for correctness and performance.
  • Implement netlists into silicon-realizable layouts and automate placement and extraction workflows.
  • Create constraints, analyze implementation reports, and automate ASIC integration processes.
  • Develop reusable SystemVerilog/UVM verification components.
  • Enhance Python-based reporting, analysis, build, simulation, and debug workflows.

The must haves:

  • Programming experience using one or more of Java, Python, TCL, Skill/Ocean, or SystemVerilog.
  • Familiarity with Linux-based development environments.

Nice to haves:

  • Previous experience with ASIC or FPGA development programs.
  • Strong analytical and debugging skills.
  • Familiarity with Agile, JIRA, Confluence, and Git.

Pay Range:

The hourly pay range for this position is $25.50 - $35.00.

Pay ranges at Ciena are designed to accommodate variations in knowledge, skills, experience, market conditions, and locations, reflecting our diverse products, industries, and lines of business. Please note that the pay range information provided in this posting pertains specifically to the primary location, which is the top location listed in case multiple locations are available.

In addition to competitive compensation, Ciena offers students access to the Employee Assistance Program (EAP), company-paid holidays, paid sick leave, and vacation pay as required by applicable laws.

At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard. Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination.

Ciena is an Equal Opportunity Employer, including disability and protected veteran status.

If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.

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