Emplois “UVM” au Canada

Aucun filtre correspondant. Essayez un autre nom.

Résultats

• 11h

  AMS Design Verification Engineer

  Mississauga, ON

  S

  Synopsys

  5+ ansSynopsys needs candidates with a degree in electrical or computer engineering and strong knowledge of analog and mixed-signal circuits. Candidates should know SystemVerilog and UVM, have used AMS simulation tools, and be comfortable scripting in Python, Perl or shell.

  HSPICE, XA, CustomSim, VCS, SystemVerilog, UVM

  11j

  Sr Manager or Principal Engineer for Firmware Development - 19315

  Markham, ON

  S

  Synopsys

  10+ ansCandidates need a Bachelor's, Master's or PhD in computer or electrical engineering, or equivalent experience, with 10+ years in a related field. They need strong skills in digital logic and firmware development, proficiency in C, Verilog and SystemVerilog/UVM, and experience leading complex projects.

  Verilog, UVM, C, Python, Perl, Bash

• 4j

  FY27 Intern - RF/Analog Verification Engineering Internship - Canada (4 or 16 months)

  Markham, ON

  Sur placeStage

  

  Qualcomm Canada ULC

  1+ ansCandidates need to be enrolled in a bachelor's, master's or PhD program in electrical, computer or computer science, with VLSI or RF/analog design coursework. Machine learning application experience and programming skills in Python or C++ are required.

  SystemVerilog, UVM, Python, C++, PyTorch, TensorFlow

  5j

  GPU Design Verification Engineer

  Markham, ON

  Sur place

  

  Qualcomm Canada ULC

  2+ ansCandidates need a relevant engineering or computer science degree plus years of hardware or software experience, depending on degree level. They need SystemVerilog, UVM, C/C++ and verification skills such as test planning, simulation and debug.

  UVM, Veloce, Palladium, Zebu, FPGA, Python

  8j

  FY27 Intern - Design Verification Engineering Internship - Canada (16 months)

  Toronto, ON

  Sur placeStage

  

  Qualcomm Canada ULC

  1+ ansCandidates need to be enrolled in a bachelor's program in electrical, computer or engineering science, or a related field, with an expected graduation of November 2028 or later. They need at least one year of academic programming experience in C, C++ or Python, and are preferred with Verilog/SystemVerilog and verification methodology knowledge.

  Synopsys VCS, Verdi, SystemVerilog, Verilog, UVM

  9j

  FY27 Intern - Soft IP ASIC Engineering Internship - Canada (12 or 16 months)

  Ottawa, ON

  Sur placeStage

  

  Qualcomm Canada ULC

  1+ ansQualcomm Canada needs candidates studying toward a bachelor's degree in electrical, computer or engineering science, or computer science. They need scripting experience in Python, Perl, TCL or Unix/Linux shell, plus source control experience with SVN, CVS or RCS.

  Verilog, SystemVerilog, UVM, SVN, CVS, RCS

  9j

  Senior Director, Technology

  Ottawa, ON

  Sur place

  

  Qualcomm Canada ULC

  10+ ansCandidates need a bachelor's in electrical engineering with 10 years of ASIC or IP development experience, or a master's with 8 years. They also need hands-on knowledge of Ethernet, UALink and OTN, HDL languages, SystemVerilog UVM and verification methods.

  SystemVerilog, Verilog, VHDL, UVM, Unix/Linux, SVN

  9j

  FY27 Intern - Softip Engineering Co-Op - Canada (4 months)

  Ottawa, ON

  Sur placeStage

  

  Qualcomm Canada ULC

  1+ ansCandidates need to be enrolled in a bachelor's or master's program in electrical, computer or related engineering, with scripting experience in Python, Perl, TCL or Unix/Linux shell and experience with source code revision systems.

  Verilog, SystemVerilog, UVM, VHDL, SVN, CVS

  9j

  Verification Engineer (Engineer–Senior Level)

  Toronto, ON

  Sur place

  

  Qualcomm Canada ULC

  2+ ansCandidates need a bachelor's degree in science or engineering with 2+ years of ASIC design or verification experience, or a master's with 1+ year, or a PhD. Strong SystemVerilog and UVM skills, constrained random verification experience and clear communication are required.

  SystemVerilog, UVM, Python, Perl, C/C++, GNU Make

  9j

  Sr ASIC Design Verification Engineer, Low Power AI

  Markham, ON

  Sur place

  

  Qualcomm Canada ULC

  2+ ansQualcomm Canada ULC needs candidates with a bachelor's, master's or PhD and 2 to 4+ years of ASIC work, depending on degree. Expert skill in Verilog, SystemVerilog, UVM and C, plus a deep understanding of ASIC/VLSI concepts, is required.

  SystemVerilog, UVM, Verilog, VHDL, SystemC, Perl

  9j

  Staff Verification Engineer, Compute Subsystems

  Markham, ON

  Sur place

  

  Qualcomm Canada ULC

  5+ ansCandidates need a bachelor's, master's, or PhD in engineering or science with several years of ASIC design or verification experience, plus strong UVM and SystemVerilog skills, bus protocol knowledge, and scripting in Perl or Python.

  UVM, Perl, Python, C

  10j

  FY27 Intern - Camera HW ASIC Verification Intern - Canada (12 or 16 months)

  Vancouver, BC

  Sur placeStage

  

  Qualcomm Canada ULC

  1+ ansCandidates need Verilog or SystemVerilog skills, ASIC design verification experience and scripting ability. Study toward a bachelor's degree in electrical, computer or a related engineering field is required.

  Verilog, UVM, Python, Perl

• 5j

  FPGA Verification Engineer

  Montréal, QC

  140k–160k $/anContrat

  

  Aversan: (www.aversan.com) is a trusted multi-service engineering and electronics manufacturing company.

  Aversan needs a bachelor's degree in electrical or computer engineering, strong experience verifying complex digital systems, and working knowledge of SystemVerilog, UVM, ModelSim/QuestaSim, and ARINC, AMBA, AXI, PCIe and Ethernet buses.

  ModelSim, QuestaSim, SystemVerilog, UVM, DOORS, Microsoft Office

• 5j

  Principal/Team Lead, Digital Verification Engineer (FEC)

  Ottawa, ON

  137k–218k $/anTemps plein

  CC

  Ciena Canada ULC

  10+ ansCandidates need 10+ years of verification experience and a bachelor's degree in electrical, computer or software engineering. They must have strong skills in C/C++, SystemVerilog, UVM and SVA, and show leadership and communication ability.

  UVM, C++, Jira, Git, Python

  6j

  Senior Digital ASIC Verification Engineer

  Ottawa, ON

  112k–179k $/anTemps plein

  CC

  Ciena Canada ULC

  5+ ansCiena Canada ULC needs candidates with 5+ years of digital ASIC/SoC verification experience and a bachelor's or master's degree in electrical or computer engineering. Strong hands-on SystemVerilog and UVM skills and experience writing verification plans are essential.

  SystemVerilog, UVM, Python, Bash, Make

• 5j

  GPU Validation Engineer

  Toronto, ON

  Temps plein

  IT

  Intel Technology India Pvt. Ltd.

  8+ ansCandidates need a bachelor's degree in a STEM field and 8+ years of industry experience in SystemVerilog/UVM pre-silicon validation and SoC verification of Design for Debug, fabric, boot, reset and power management. A master's degree plus 6+ years of experience is an equivalent path, and GPU pre-silicon validation experience is a plus.

  UVM

• 7j

  Lead Digital Verification Engineer

  Montréal, QC

  Temps plein

  C

  Cadence

  Candidates need a Bachelor's degree in electrical, computer engineering or computer science, plus knowledge of verification methodologies, metric driven verification, UVM, SystemVerilog assertions and the digital design flow. A Master's degree, UVM coding experience, scripting skills and protocol knowledge such as PCIe, USB or Ethernet are preferred.

  SystemVerilog, UVM, Python, Perl, Cadence tools

• 11j

  Engineering Student - FPGA Verification - Winter 2027

  Sainte-Anne-de-Bellevue, QC

  Temps plein

  

  MDA

  Candidates need completion of a third year of an electrical or computer engineering bachelor's degree with a 3.2/4.0 minimum GPA. They need a desire to learn, initiative, and a collaborative attitude, plus security clearance eligibility.

  SystemVerilog, VHDL, Verilog, Tcl, Python, C/C++

• 18j

  Senior Verification Engineer – High Speed Coherent Interconnect Hub

  Toronto, ON

  Temps plein

  NC

  NVIDIA Canada Dev. Inc.

  3+ ansCandidates need a BS or MS or equivalent experience, plus 3+ years of ASIC verification work on complex IP or SoC subsystems. Strong skills in SystemVerilog, UVM and coverage-driven verification are required.

  SystemVerilog, UVM, Python, Perl, Shell

• 18j

  ASIC Verification Engineer, AI Networking IP

  Ottawa, ON

  Temps plein

  AM

  Advanced Micro Devices, Inc

  Candidates need a bachelor's or master's degree in computer or electrical engineering, plus interest in ASIC verification and digital design. Experience with SystemVerilog, C or C++, and scripting languages such as Python or Perl is an asset.

  SystemVerilog, UVM, Claude Code, Codex, Python, Perl

• 18j

  ASIC Verification Engineer, AI Networking IP

  Ottawa, ON

  Temps plein

  AI

  AMD, Inc.

  Candidates need a bachelor's or master's in computer or electrical engineering and an understanding of digital design. Experience with SystemVerilog, C or C++, and scripting such as Python or Perl is preferred.

  SystemVerilog, UVM, Claude Code, Codex, Python, Perl

• 20j

  Senior ASIC Design Engineer - DSP/Analog/SerDes

  Ottawa, ON

  CC

  Celero Communications, Inc.

  10+ ansCandidates need a master's or PhD in electrical or computer engineering, 10+ years of digital ASIC design, and strong Verilog or SystemVerilog skills. Knowledge of DSP, high-speed SerDes, mixed-signal or optical communications is also required.

  Verilog, SystemVerilog, Python, Tcl, MATLAB, UVM

• 22j

  Sr FPGA Programmer - Test et Vérification DO-254

  Montréal, QC

  Temps plein

  

  Thales

  10+ ansDiplôme d'ingénieur ou Master 2 / Doctorat, 5 à 10 ans d'expérience en vérification; Maîtrise de VHDL et UVM; Expérience avec Questa ou ModelSim et outils Aldec

  Questa, ModelSim, Aldec Active-HDL, Git, DOORS, Polarion

• 22j

  Sr FPGA Programmer - Test et Vérification DO-254

  Montréal, QC

  HybrideTemps plein

  TC

  Thales Canada Inc., Avionics

  10+ ansDiplôme d'ingénieur ou Bac+5 avec 5 à 10 ans d'expérience en vérification; Maîtrise de VHDL et UVM, simulation avec Questa ou ModelSim; Connaissance approfondie de DO-254 et des métriques de code coverage

  Questa, ModelSim, Aldec Active-HDL, Git, DOORS, Polarion

13 entreprises