ASIC Physical Designer

@ Talentlab

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Ontario

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SIGNAUX

En bref

Talentlab is hiring an ASIC Physical Designer for its client, a global semiconductor company in North York, Ontario. The role assists Design Engineering leads with physical design and performance verification, plus layout verification and reliability checks on advanced technology nodes.

Responsabilités :

Assist Design Engineering leads in executing physical design
Perform performance verification
Perform layout verification and reliability checks

Résumé des exigences :

Experience with physical design CAD flows and design verification
Proficiency in DRC, LVS and debug methodologies
Hands-on experience with Cadence Virtuoso (preferred)
Scripting in PERL and Shell (preferred)
Bachelor's degree in a relevant field (preferred)

Outils et compétences

Cadence Virtuoso PERL Shell Unix/Linux

Source et dates

Type de source non vérifié · cats

Date publiée par l’employeur: 2025-02-27
Première détection par notre source: 2026-10-15
Mise à jour du dossier source: 2026-11-05

Ces dates décrivent le dossier source, pas une vérification en direct du recrutement. Consultez l’offre originale.

Détails du poste

Domaine	Génie
Déplacements	avion : aucun · route : aucun
Milieu de travail	Bureau
Position	Surtout assis
Exigences physiques	physique faible · ordinateur élevé
Langues	English
Formation	Baccalauréat (préféré)

Résumé et détails rédigés par l’IA à partir de l’offre; l’offre de l’employeur fait foi.

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Talentlab

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Champ	Valeur
Offres sur Jobsy	26

Description

Physical Design Engineer

About the Team:
Our client, a global leader in semiconductor innovation, is looking for a Physical Design Engineer to join their high-performing team in North York, Ontario. This team plays a critical role in executing physical design tasks and ensuring high-quality layout verification and reliability checks. If you're looking for an opportunity to collaborate with industry-leading experts in a dynamic, fast-paced environment, this role is for you.

What Our Client Offers:

A fast-paced, dynamic environment working on advanced technology nodes.
An opportunity to work alongside top industry professionals in semiconductor design.
The ability to make a meaningful impact on next-generation semiconductor technology.

Key Responsibilities:

Assist Design Engineering (DE) Leads in executing physical design, including Performance Verification.
Perform layout verification and reliability checks.

Required Skills:

Experience with physical design CAD flows and design verification.
Proficiency in DRC, LVS, and debug methodologies.

Preferred Skills:

Hands-on experience with Cadence Virtuoso.
Scripting skills in PERL and Shell for automation and workflow efficiency.
Familiarity with Unix/Linux environments.
Strong communication and team collaboration skills.
Bachelor’s degree (BS+) in a relevant field.
Preferred experience in Process node design.

This is an exciting opportunity to work on cutting-edge semiconductor technology and be part of a team that is shaping the future of high-performance computing. If you have the required skills and experience, please reach out to [email protected]