Physical Design Engineer
Vancouver, BCAdvanced Micro Devices, Inc
Candidates need a bachelor's or master's degree in computer or electrical engineering and hands-on ASIC physical design experience from RTL to GDSII. Strong Verilog, timing analysis, low-voltage design and advanced-node tape-out experience (3nm to 16nm) are preferred.
Synopsys tools, Cadence tools, Mentor Graphics tools, Verilog
Physical Design Engineer
Markham, ONAdvanced Micro Devices, Inc
8+ ansCandidates need a bachelor's, master's or PhD in electrical, electronics or computer engineering, with 8, 4 or 2 years of physical design experience respectively. They need expertise in block-level place and route, timing closure, physical verification and power, performance and area optimization, plus hands-on debugging of EDA tools from Synopsys, Cadence and Siemens.
Synopsys ICC2, Cadence Innovus, Synopsys PrimeTime, Spyglass, RedHawk, Calibre
Physical Design Engineer
Markham, ONAdvanced Micro Devices, Inc
Candidates at Advanced Micro Devices need ASIC physical design experience from RTL to GDSII, strong Verilog and timing analysis skills, and hands-on tape-out experience on 3nm to 16nm SoCs. They also need experience with Synopsys, Cadence or Mentor Graphics CAD tools and a bachelor's or master's degree in electrical or computer engineering.
Synopsys tools, Cadence tools, Mentor Graphics tools, Verilog
Principal ASIC Design Engineer
Markham, ONAdvanced Micro Devices, Inc
Candidates need a track record of leading ASIC or silicon designs through multiple tape-outs, plus deep RTL and microarchitecture skills. A bachelor's degree in an engineering or computer field is preferred, and a master's or PhD is desired.
Verilog, SystemVerilog, Python, Perl, Tcl