Principal Engineer - Validation (Systems)
Burnaby, BCMCHP Semiconductor Canada ULC
10+ ansCandidates need 10 years of silicon or SoC validation experience, strong C/C++ and Python skills, and hands-on lab experience with high-speed test equipment. A Bachelor's or Master's in electrical or computer engineering or computer science is required.
Oscilloscope, Protocol analyzer, Logic analyzer, FPGA, Emulation platform, Validation board
Senior SoC Design Engineer
Burnaby, BCMCHP Semiconductor Canada ULC
3+ ansCandidates need a Bachelor's or Master's in electrical or computer engineering and 3 to 5 years of related experience, including RTL design in SystemVerilog and Verilog. Experience with ASIC design flows, synthesis, static timing analysis and PCI-Express is valued.
Synopsys Design Compiler, Cadence Incisive, Verilog, Perl, Python, Tcl