FPGA Digital Design Engineer
Toronto, ONTélétravailTemps plein
Kepler Communications
5+ ansCandidates need a bachelor's degree in computer or electrical engineering and 5+ years of FPGA/RTL design experience. They must know Verilog, SystemVerilog or VHDL, Xilinx Zynq and UltraScale devices, clock domain crossing and timing closure, and scripting in Python or Tcl.
Vivado, Quartus, ModelSim, Questa Sim, Riviera-Pro, Python
Software Engineering Intern (January 2027)
Toronto, ON29,75–39 $/hHybrideStage
Kepler Communications
Candidates need to be enrolled in a Computer Science degree or equivalent and returning to studies after the internship. They need prior internship experience building Python backend services, plus experience supporting software development and writing tests.
Python, git, PostgreSQL, DynamoDB, Kubernetes, Terraform