Analog Design, Manager - 18463
Kanata, ONSynopsys
8+ ans2+ gestionCandidates need an M.A.Sc. with 8+ years or a PhD with 6+ years of analog or mixed-signal IC design experience, plus 2+ years of people management. They must have deep Multi-Gbps SerDes expertise, transistor-level design skills, and experience with SPICE, Verilog-A and layout.
SPICE, Verilog-A, Industry-standard simulation tools
Principal SI/PI Engineer - 18619
Mississauga, ONSynopsys
12+ ansCandidates need a bachelor's degree (master's or PhD preferred) in electrical engineering and 12+ years of high-speed SI/PI experience on SerDes links. They also need strong skills in simulation tools, lab measurement and scripting, plus proven technical leadership.
HSPICE, Keysight ADS, SystemVue, Ansys HFSS, SIwave, AEDT
ATE Test Engineer, Sr Staff Engineer - 18756
Nepean, ONSynopsys
8+ ansCandidates need 8+ years of silicon validation or ATE test experience and a degree in electrical engineering or a related field. They need strong knowledge of DDR, LPDDR and HBM protocols and JEDEC specifications, plus expertise with ATE platforms, oscilloscopes, BERTs and VB code.
Teradyne, Advantest, LTX, Credence, Introspect, oscilloscope
Silicon Validation Engineer
Mississauga, ONSynopsys
6+ ansCandidates need a Master's in electrical or electronics engineering with 6+ years of post-silicon validation experience, or a Bachelor's with 7+ years. Hands-on lab skill with BERTs, oscilloscopes, VNAs and TDRs, plus MATLAB and Python, is required.
BERT, real-time oscilloscope, sampling oscilloscope, VNA, TDR, MATLAB
Senior Staff Hardware Validation Engineer
Mississauga, ONSynopsys
6+ ansSynopsys needs a bachelor's degree in electrical or electronic engineering with 8 years of relevant experience, or a master's with 6 years. Candidates need lab test equipment experience, PCB fabrication house experience and skill running PI and SI simulations.
HFSS, high-speed scopes, power meters, IR cameras, FPGA development tools, Verilog HDL
Hardware Validation Engineer, Sr Staff
Nepean, ONSynopsys
6+ ansCandidates need 6-8+ years of high-speed hardware design and validation experience and expert Cadence Allegro skills. They also need strong signal integrity knowledge, bench debugging experience and familiarity with JTAG, I2C, SPI and UART interfaces.
Cadence Allegro, logic analyzer, oscilloscope, VNA, spectrum analyzer, protocol analyzer
Product Management , Staff
Vancouver, BCSynopsys
5+ ansCandidates need a technical degree or equivalent experience and at least five years of product management in photonics, optics or simulation software. They should understand photonic design workflows and simulation methods such as FDTD, and have experience with tools like OptoCompiler or Lumerical.
OptoCompiler, Lumerical
Sr Staff Package Design Engineer
Nepean, ONSynopsys
10+ ansCandidates need 10+ years of semiconductor package design or electrical modeling experience and a bachelor's degree in electrical or electronics engineering. They must have strong skills in circuit theory, 3D EM modeling in Ansys HFSS, and clear communication in English.
Ansys HFSS, EDA tools, Windows, Linux
Sr Staff PCB Design Engineer
Markham, ONSynopsys
10+ ansCandidates need 10+ years of high-speed PCB design or signal integrity experience and strong circuit and transmission line theory. They also need hands-on 3D electromagnetic modelling experience with Ansys HFSS or similar tools, plus a Bachelor's degree in electrical or electronics engineering.
Ansys HFSS, PCB layout tools, Windows, Linux