ASIC Physical Design Engineer - Power, Senior
Télétravail au CanadaTélétravailTemps plein
Positron AI
8+ ansCandidates need 8+ years of ASIC design experience with a strong power focus, hands-on low-power design and UPF/CPF experience, and proficiency with PrimePower, Joules and Tcl or Python. Advanced process node experience and a track record of meeting power targets on production silicon are required.
PrimePower, Joules, Tcl, Python, UPF, CPF
Physical Design Engineer - Synth, Senior
Télétravail au CanadaTélétravailTemps plein
Positron AI
8+ ansCandidates need 8+ years of ASIC implementation experience, including at least two tapeouts, and strong synthesis and timing-closure experience on large designs. Expertise with Genus or Design Compiler, SDC constraints, Tcl and Python scripting, and advanced process nodes (7nm and below preferred) is required.
Cadence Genus, Synopsys Design Compiler, Tcl, Python