Verification Engineer
Markham, ONAdvanced Micro Devices, Inc
Candidates need strong SystemVerilog and UVM skills, solid ASIC/SoC verification experience, and familiarity with constrained-random, coverage-driven and formal (SVA) methods. A bachelor's or master's in computer or electrical engineering is required.
Synopsys VCS, Cadence IES, Cadence IEV, Jasper, VC-Formal, Magellan
Summer 2027 Long Term Hardware Design Verification Engineering Intern/Co-Op
Markham, ONAdvanced Micro Devices, Inc
Candidates need to be enrolled in a Canada-based university Bachelor's program in electrical engineering, computer science, computer engineering or a related field. Experience with C++, Python, Perl, UVM, Verilog or SystemVerilog, digital systems, and Linux or Windows debugging is an asset.
Verilog, UVM, Perl, Python, MySQL, PHP
Short Term 2027 Hardware Design Verification Engineering Intern/Co-Op
Vancouver, BCAdvanced Micro Devices, Inc
Candidates need to be enrolled in a Canadian university Bachelor's program in electrical engineering, computer science, computer engineering or a related field. Programming in C++, Python, Perl or Shell, and knowledge of Verilog, SystemVerilog and digital logic design, are strongly encouraged.
Verilog, UVM, Perl, Python, MySQL, PHP
Short Term 2027 Hardware Design Verification Engineering Intern/Co-Op
Markham, ONAdvanced Micro Devices, Inc
Candidates need current enrolment in a Canadian university Bachelor's program in electrical engineering, computer science, computer engineering or a related field. Programming in Python, Perl or C++, and familiarity with Verilog, SystemVerilog and digital logic design are strongly preferred.
Verilog, UVM, Perl, Python, MySQL, PHP