FY27 Intern - Softip Engineering Co-Op - Canada (4 months)
Ottawa, ONQualcomm Canada ULC
1+ ansCandidates need to be enrolled in a bachelor's or master's program in electrical, computer or related engineering, with scripting experience in Python, Perl, TCL or Unix/Linux shell and experience with source code revision systems.
Verilog, SystemVerilog, UVM, VHDL, SVN, CVS
FY27 Intern - Firmware/Embedded Software Engineering Internship - Canada (12 or 16 months)
Toronto, ONQualcomm Canada ULC
1+ ansCandidates need to be enrolled in a bachelor's degree in electrical or computer engineering, engineering science or computer science, with at least one year of academic programming experience in C, C++ or Python. Strong debugging, problem-solving and teamwork skills are needed, and availability must match the 12- or 16-month internship dates.
Git, Linux, FPGA, Verilog, SystemVerilog, GitHub Actions
FY27 Intern - Edge AI and Display Hardware Architecture Development Engineering Internship - Canada (16 months)
Markham, ONQualcomm Canada ULC
Qualcomm Canada ULC needs candidates enrolled in an engineering or computer science bachelor's program, available May/June 2027 to August/September 2028 and graduating November 2028 or later. Strong analytical skills, programming in C/C++ or Python, and HW modeling and simulation experience are required.
Verilog, VHDL, C/C++, Python, HW simulation tools, HW CAD tools
FY27 Intern - Automotive Engineering Internship - Canada (16 months)
Markham, ONQualcomm Canada ULC
1+ ansQualcomm Canada ULC needs candidates enrolled toward a bachelor's degree in electrical, computer or related engineering, with coursework or experience in C and C++, embedded systems and Linux. Availability for May or June 2027 through August or September 2028 is required.
Jenkins, Axiom, Linux, QNX, Android, Zephyr
FY27 Intern - Camera Design Implementation Intern - Canada (16 months)
Vancouver, BCQualcomm Canada ULC
Candidates need to be enrolled in a bachelor's degree in engineering, computer science or a related field, with an expected graduation of November 2028 or later. Strong scripting skills and knowledge of ASIC design flow are needed.
synthesis tools, static timing analysis tools, formal verification tools