ASIC Physical Design, Sr Staff Engineer - 16724
Nepean, ONSynopsys
9+ ansCandidates need 9+ years of ASIC physical design experience on complex SoC or test chip projects at advanced nodes. They must know the full physical design flow and tools such as Design Compiler, PrimeTime, IC Compiler II, Calibre and RedHawk, and must be authorized to work in the USA.
Design Compiler, PrimeTime, IC Compiler II, ICV, Calibre, RedHawk
Analog Design, Sr Staff Engineer - 18144
Kanata, ONSynopsys
8+ ansCandidates need a master's degree with 8+ years or a PhD with 6+ years of analog circuit design experience. Experience with op-amps, current mirrors and bandgaps is required, and SERDES or DDR knowledge is strongly desired.
CAD tools for analog design
Sr. Staff AI Full Stack Engineer
Mississauga, ONSynopsys
Candidates need advanced Python skills for full stack work, cloud and container experience, working knowledge of generative AI and LLM applications, and strong distributed systems and API design. Leadership and mentoring ability is also required.
Python, Docker, Kubernetes, AWS, GCP, Azure
Analog Design, Sr Architect - 18729
Markham, ONSynopsys
12+ ansCandidates need at least 12 years of related experience in high-speed interfaces and mixed-signal design. They also need skills in custom analog design, simulation, verification, debugging, and writing technical specifications.
Documentation, Communication skills, Troubleshooting, Debugging
Principal SI/PI Engineer - 18619
Mississauga, ONSynopsys
12+ ansCandidates need a bachelor's degree (master's or PhD preferred) in electrical engineering and 12+ years of high-speed SI/PI experience on SerDes links. They also need strong skills in simulation tools, lab measurement and scripting, plus proven technical leadership.
HSPICE, Keysight ADS, SystemVue, Ansys HFSS, SIwave, AEDT
Pre-Silicon Signoff Lead
Mississauga, ONSynopsys
10+ ansCandidates need an MSc or PhD in electrical or computer engineering and 10+ years of industry experience. They need deep knowledge of PCIe and Ethernet, SystemVerilog, UVM and scripting, plus proven leadership and mentoring skills.
SystemVerilog, UVM, Python, TCL, Perl, C++
Project Engineering Management, Principal Engineer - 18617
Mississauga, ONSynopsys
8+ ansCandidates need an engineering or applied science degree (or equivalent) and 8+ years of semiconductor experience. Strong project management skills, customer communication experience, and knowledge of SOC, ASIC, Silicon IP, PCIe and Ethernet are expected.
Linux
Analog Design, Sr Staff Engineer - 18597
Ottawa, ONSynopsys
7+ ansCandidates need an engineering or applied science degree and 7 to 12 years of semiconductor, Silicon IP or SoC experience. Strong project management, customer communication and cross-functional leadership skills are required, along with familiarity with Linux environments.
Linux
Project Engineering Management, Principal Engineer
Mississauga, ONSynopsys
10+ ansCandidates need an engineering degree or equivalent experience, 10+ years of customer-facing project management, and familiarity with mixed-signal IP, SoC or ASIC development. Strong communication, MS Project, Jira, UNIX/Linux and quality management system knowledge are also required.
MS Project, Jira, UNIX, Linux