Short Term 2027 Data Analyst Intern/Co-Op
Markham, ONAMD, Inc.
Candidates need to be enrolled in a Canadian university undergraduate program in a data or engineering field. Experience with Python, SQL, R, Java, data processing, cloud services and visualization tools is strongly encouraged.
Power BI, Snowflake, Oracle, SQL Server, Microsoft Azure, Kubernetes
SoC Physical Design Implementation Lead
Markham, ONAMD, Inc.
Candidates need deep hands-on experience with place and route, static timing analysis, clock distribution and physical verification on large SoCs. Advanced process nodes, 3D stacking, and Synopsys, Cadence or Siemens CAD tools are preferred, along with Tcl, Perl or Shell scripting.
Synopsys tools, Cadence tools, Tcl, Perl, Shell
Silicon Design Engineer - Technical Lead
Markham, ONAMD, Inc.
AMD needs candidates with experience in I/O protocols such as USB, PCIe and CXL, plus micro-architecture and RTL design for multi-clock, high-frequency, low-power designs. A master's or bachelor's in electrical engineering or equivalent is preferred.
Python, Perl
SoC Design Lead, Microarchitecture and Design Methodology
Markham, ONAMD, Inc.
Candidates need strong computer architecture and digital design foundations, plus knowledge of STA, clocks and power optimization. Verilog or SystemVerilog experience with UVM is preferred, along with strong communication, analytical and teamwork skills.
Verilog, SystemVerilog, UVM
RTL Design Engineer
Markham, ONAMD, Inc.
Candidates need experience with I/O protocols such as USB, PCIe and CXL, plus RTL design for multi-clock, high-frequency, low-power designs. A bachelor's or master's degree in electrical engineering or equivalent is preferred.
Python, Perl
Physical Design Engineer
Markham, ONAMD, Inc.
Candidates need a bachelor's degree in an electrical, electronics or computer engineering discipline and deep experience in ASIC physical design implementation and signoff. They also need hands-on skill with industry EDA tools and power, performance and area optimization.
Synopsys ICC2, Cadence Innovus, PrimeTime, Spyglass, RedHawk, Calibre
SoC Lead Engineer – LEC & Low Power Signoff
Markham, ONAMD, Inc.
Candidates need proven SoC implementation and tapeout experience, in-depth LEC and low power static verification skills, and hands-on use of Formality or Conformal, VC-LP or CLP, and Design Compiler or Fusion Compiler. Verilog, VHDL, UPF, Tcl, Perl and Python skills and a BS/MS in electrical engineering or a related field are also expected.
Synopsys Formality, Cadence Conformal, Synopsys VC-LP, Cadence Conformal Low Power, Design Compiler, Fusion Compiler
STA/Constraints Engineer
Vancouver, BCAMD, Inc.
Candidates need industry experience in STA, constraints and timing signoff, and expert use of Synopsys PrimeTime and GCA (ICC2 or Fusion Compiler desired). Scripting in Perl, TCL, Shell or Python and Verilog RTL experience are valued.
ICC2, Verilog
Principal ASIC Design Engineer
Markham, ONAMD, Inc.
Candidates need a track record of leading ASIC or silicon designs through multiple product tape-outs, plus deep RTL and microarchitecture experience. Strong communication skills and the ability to lead technical reviews are also required.
Verilog, SystemVerilog, Python, Perl, Tcl