DFT Engineering Intern
Toronto, ONAstera Labs Early Career - North America 2027
Candidates need coursework or hands-on experience in electrical or computer engineering or a related field, and an understanding of digital logic and RTL. Programming in Verilog, SystemVerilog, Python, Tcl, Perl, C or C++ is needed, plus comfort in a Linux environment.
Verilog, SystemVerilog, Python, Tcl, Perl, Linux
Design Verification Engineer Intern (Toronto)
Toronto, ONAstera Labs Early Career - North America 2027
Candidates need to be pursuing a bachelor's or master's degree in electrical, computer engineering or computer science. They need coding skills in SystemVerilog, C/C++ or Python, Linux and Git familiarity, and strong debugging ability.
VCS, Verdi, DVE
Analog Mixed Signal Engineer Intern (Toronto)
Toronto, ONAstera Labs Early Career - North America 2027
Astera Labs needs candidates pursuing an M.S. or Ph.D. in Electrical Engineering, ideally with prior analog, mixed-signal, RF or custom IC design internship experience. Strong circuit fundamentals, device physics and simulation skills are expected.
Industry-standard circuit design and simulation tools, Verilog-A, Verilog, Python, MATLAB