Physical Design Engineer
Vancouver, BCAMD, Inc.
Candidates need hands-on ASIC physical design experience from RTL to GDSII, strong Verilog and timing analysis skills, and tape-out experience on advanced nodes such as 3nm, 5nm, 7nm or 16nm. A bachelor's or master's degree in computer or electrical engineering is required.
Synopsys, Cadence, Mentor Graphics, Verilog
3D IC and ADVANCED PACKAGING CAD ENGINEER
Markham, ONAMD, Inc.
Candidates need a computer or electrical engineering degree, experience in 3D-IC and advanced packaging, and hands-on work with Synopsys or Cadence EDA tools. Strong Python, TCL and Perl scripting on Linux, plus experience applying AI or LLMs to CAD or hardware design, are preferred.
Synopsys 3DIC Compiler, Synopsys EDA tools, Cadence EDA tools, Verilog, UPF, Python
SoC Lead Engineer – LEC & Low Power Signoff
Markham, ONAMD, Inc.
Candidates need proven SoC implementation and tapeout experience, in-depth LEC and low power static verification skills, and hands-on use of Formality or Conformal, VC-LP or CLP, and Design Compiler or Fusion Compiler. Verilog, VHDL, UPF, Tcl, Perl and Python skills and a BS/MS in electrical engineering or a related field are also expected.
Synopsys Formality, Cadence Conformal, Synopsys VC-LP, Cadence Conformal Low Power, Design Compiler, Fusion Compiler
Physical Design Engineer
Markham, ONAMD, Inc.
Candidates need hands-on ASIC physical design experience from RTL to GDSII, strong Verilog and timing analysis skills, and tape-out experience on advanced nodes such as 3nm, 5nm, 7nm or 16nm. A bachelor's or master's degree in computer or electrical engineering is required.
Synopsys, Cadence, Mentor Graphics, Verilog