Senior ASIC Design Verification Engineer
Télétravail au CanadaTélétravail
Ethernovia, Inc.
10+ ansCandidates need a BS or MS in electrical engineering, computer science or a related field, and at least 10 years of ASIC verification experience. Required skills include SystemVerilog, UVM, Python, TCL and C/C++, plus strong debugging and communication abilities.
Verilog, UVM, Python, TCL, C/C++, SystemC