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Tenstorrent University Jobs: Tenstorrent is a next-generation computing company that builds computers for AI.
Candidates need to be students in EE, ECE, CE or CS with coursework in digital design and computer architecture. They should know ASIC concepts such as RTL, verification, logic synthesis and timing analysis, and have scripting or programming skills.
Python, C++, PERL, tcl, architectural simulator
Astera Labs: Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions.
10+ ansAstera Labs needs a candidate with 10+ years in ASIC or SoC development, including 3+ years in technical program management. Candidates need hands-on knowledge of the chip design flow, EDA and CAD tools, and pre-silicon validation.
CAD infrastructure, Emulation platforms, FPGA prototyping platforms
Humanoid: First AI and robotics company in the UK, creating the world’s leading, commercially scalable, and safe humanoid robots.
5+ ansCandidates need 5+ years of professional embedded or real-time firmware experience, a related engineering or computer science degree, and strong C and C++ skills with Python for tooling. Experience with RTOS, communication protocols (EtherCAT, CAN, SPI, UART, I2C), and debugging tools such as oscilloscopes and logic analyzers is required.
C, C++, Python, RTOS, EtherCAT, CAN
Tenstorrent Unlisted/Referral Jobs: Tenstorrent is a next-generation computing company that builds computers for AI.
Candidates need deep ASIC design flow expertise, strong RTL design skills and experience with static and dynamic analysis tools for high-performance hardware. Senior-level experience leading methodology improvements and collaborating across teams is expected.
Lint, CDC tools, RDC tools, DFT tools, SDC, UPF
Lightmatter
12+ ansLightmatter needs candidates with a bachelor's degree in electrical or computer engineering and 12 years of physical design experience, including 5 years of hands-on ASIC timing work. They must be skilled in Cadence or Synopsys timing tools and scripting in TCL and Python, Perl, or Shell.
Synopsys PrimeTime, Cadence Tempus
Lightmatter
12+ ansCandidates need a bachelor's in electrical or computer engineering and 12+ years of physical design experience, including taped-out large ASIC or mixed-signal chips. Strong scripting skills in TCL and Python and teamwork across functional groups are also required.
Cadence, TCL, Python, Shell, DRC, LVS
Ethernovia, Inc.
10+ ansCandidates need a BS or MS in electrical engineering, computer science or a related field and 10+ years of ASIC RTL design or architecture experience. They must have built complex SoCs, know Verilog/SystemVerilog and simulation tools, and work well both independently and in teams.
Verilog, Perl, TCL, C/C++, Make
Ethernovia, Inc.
10+ ansCandidates need a BS or MS in electrical engineering, computer science or a related field, and at least 10 years of ASIC verification experience. Required skills include SystemVerilog, UVM, Python, TCL and C/C++, plus strong debugging and communication abilities.
Verilog, UVM, Python, TCL, C/C++, SystemC
6 entreprises