Staff ASIC Verification Engineer, Low Power AI
Markham, ONQualcomm Canada ULC
4+ ansQualcomm Canada ULC needs candidates with a relevant degree and 4+ years of ASIC work (3+ with a master's, 2+ with a PhD). Expert knowledge of Verilog, VHDL and SystemVerilog UVM is required, plus solid C skills.
SystemVerilog, UVM, Verilog, VHDL, SystemC, Perl
Firmware Engineer – SerDes PHY (all levels)
Toronto, ONQualcomm Canada ULC
6+ ansCandidates need an engineering or computer science degree and 4 to 6+ years of software engineering experience, depending on degree level. They also need at least 3 years of programming experience in languages such as C, C++, Java or Python.
JTAG debuggers, git, Verilog, SystemVerilog
Machine Learning Engineer, Frameworks & Performance (New Grad to Principal level)
Markham, ONQualcomm Canada ULC
6+ ansCandidates need a degree in computer science, engineering or a related field and 6 to 8+ years of relevant engineering experience, depending on degree level. Strong algorithm development, performance analysis, C++ and Python skills are essential, with compiler, PyTorch or ONNX knowledge as assets.
C++, Python, PyTorch, ONNX, git, Jenkins
Senior ASIC Design Engineer, Compute DSP/AI Processors (multiple levels)
Markham, ONQualcomm Canada ULC
2+ ansCandidates need a bachelor's, master's or PhD in engineering or science with 2 to 4+ years of ASIC design or verification experience, depending on degree. Strong SystemVerilog, synthesis and design tool skills and an understanding of high-performance processor design are needed.
SystemVerilog, VCS, Synopsys Design Compiler, Cadence, Mentor, Linting tools