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Vailexa
Vailexa needs candidates with hands-on cabling and field testing skills, basic knowledge of IP phones, PoE and CLI/web interfaces, and strong Excel skills. A diploma or degree in a networking or telecom field, or equivalent experience, is expected, and a CCNA is preferred.
Cable testers, Tone generators, Analog test sets, Microsoft Excel, IP telephony systems, PoE switches
Telesat: Continuously innovating to meet the connectivity demands of the future, Telesat Lightspeed, the company’s Low Earth Orbit (LEO) satellite network,…
8+ ansCandidates need an engineering degree, 8+ years of communications or networking product or systems experience, and strong customer-facing solutioning skills. Eligibility for an Enhanced Reliability Security Clearance, fluent English and travel are also required.
Lightspeed, Sales, Microsoft Teams
Rivian and Volkswagen Group Technologies
Candidates need current enrolment in a Bachelor's or Master's program at an accredited Canadian university and proficiency in C or C++. Some Python exposure is needed, and coursework in embedded systems, control theory or automotive protocols is an asset.
MATLAB, Simulink, CAN, LIN, Automotive Ethernet
Rivian and Volkswagen Group Technologies
2+ ansCandidates need a bachelor's degree in electrical, computer or software engineering and 2+ years of embedded or automotive software experience. Strong C and Python skills, knowledge of vehicle networks and diagnostics, and safety standards such as ISO 26262 are required.
JAMA, Flow, HIL bench, SIL framework
Astera Labs Early Career: Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions.
Candidates need to be pursuing a bachelor's degree or higher in electrical engineering, computer engineering or computer science. They need programming experience in C, C++, C# or Python, and hands-on experience building and troubleshooting computer systems.
protocol analyzer, high-speed oscilloscope, BERT
Astera Labs Early Career: Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions.
Candidates need a computer science or electrical/software engineering background, prior co-op experience in firmware or embedded software, and RTOS knowledge. C or C++, Python, git and debugging with JTAG are expected.
git, JTAG, gcc, make, PyTest, GoogleTest
Astera Labs: Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions.
10+ ansAstera Labs needs a candidate with 10+ years in ASIC or SoC development, including 3+ years in technical program management. Candidates need hands-on knowledge of the chip design flow, EDA and CAD tools, and pre-silicon validation.
CAD infrastructure, Emulation platforms, FPGA prototyping platforms
Astera Labs: Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions.
2+ ansCandidates need a bachelor's degree in electrical or electronics engineering, 2 to 5 years of digital design experience on complex chips, and hands-on SystemVerilog or Verilog RTL skills. PCIe or Ethernet IP experience and Python or Perl scripting are also required, and candidates must be authorized to work in Canada.
SystemVerilog, Verilog, Synopsys, Cadence, Python, Perl
Astera Labs: Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions.
2+ ansCandidates need a bachelor's degree in electrical engineering or a related field and 2 to 5 years of verifying complex chips. Hands-on SystemVerilog, UVM and C/C++ experience, including C/C++ integration with SystemVerilog, is required, as is authorization to work in Canada.
SystemVerilog, UVM, C/C++, Python, Perl, FPGA emulation platform
Astera Labs: Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions.
8+ ansCandidates need a bachelor's degree in an engineering or computer field and 8+ years of experience in high-speed connectivity or networking silicon. They must have hands-on lab debug skills and a record of working directly with hyperscaler or OEM customers.
BERT, Protocol analyzer, Python, Shell
Astera Labs: Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions.
8+ ansCandidates need a bachelor's degree in a technical field and 8 to 12 years of embedded firmware experience. They must know embedded C/C++, Ethernet or high-speed connectivity hardware, and analog or mixed-signal tuning. A master's degree and Python or lab-instrument experience are preferred.
Oscilloscope, BERT, Logic analyzer, GDB, Git, Jenkins
Astera Labs: Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions.
8+ ansCandidates need an MS or PhD in Electrical Engineering or a related field and 8+ years of analog and mixed-signal IC design experience. They should have proven high-speed circuit design in advanced CMOS/FinFET nodes and proficiency with Cadence Virtuoso and Spectre.
Cadence Virtuoso, Spectre
Cerebras Systems
1+ ansCerebras Systems needs candidates with a degree in computer or electrical engineering or computer science, or equivalent practical experience, and at least one year in infrastructure or data center work. They also need hands-on knowledge of server, storage and networking hardware, scripting skills in Python, Bash or PowerShell, and strong attention to detail.
Python, Bash, PowerShell
Ethernovia, Inc.
6+ ansCandidates need a Bachelor's or Master's degree in computer science or a related field and 6+ years of experience. Strong C/C++ skills, device driver and operating system knowledge (Linux, QNX or RTOS), and hands-on hardware experience with communication devices are required.
Git, Perforce, Yocto, uboot
Ethernovia, Inc.
10+ ansCandidates need a BS or MS in electrical engineering, computer science or a related field and 10+ years of ASIC RTL design or architecture experience. They must have built complex SoCs, know Verilog/SystemVerilog and simulation tools, and work well both independently and in teams.
Verilog, Perl, TCL, C/C++, Make
Ethernovia, Inc.
10+ ansCandidates need a BS or MS in electrical engineering, computer science or a related field, and at least 10 years of ASIC verification experience. Required skills include SystemVerilog, UVM, Python, TCL and C/C++, plus strong debugging and communication abilities.
Verilog, UVM, Python, TCL, C/C++, SystemC
Alarm.com
8+ ansCandidates need 8+ years of embedded software development with strong C/C++ skills on Linux, deep experience with Linux build toolchains, and knowledge of cellular, Wi-Fi and IoT connectivity. They also need proven experience leading architecture decisions and communicating technical trade-offs.
Yocto, buildroot, OpenWRT, Android AOSP, Linux
10 entreprises