Principal Engineer - Design
Burnaby, BCMCHP Semiconductor Canada ULC
10+ ansMicrochip Semiconductor Canada ULC needs candidates with a BS or MS in electrical or computer engineering and 10+ years of experience. Strong skills in serial protocols, Linux, C, Python and HDL design are required.
Cadence Palladium, Cadence Protium, FPGA, protocol analyzers, test and defect tracking tools
Principal Engineer -Design
Saskatoon, SKMCHP Semiconductor Canada ULC
10+ ansCandidates need 10 years of experience in synthesis, static timing analysis and formal verification, plus tapeout experience on 16nm or smaller processes. Strong scripting skills and a degree in computer science or electrical/VLSI engineering are required.
Cadence Genus, TCL, Perl, Python, UPF, CPF
Senior Manager-Design Engineering
Burnaby, BC +2MCHP Semiconductor Canada ULC
12+ ansCandidates need a Bachelor's or Master's in electrical or computer engineering, 12+ years of related experience and proven experience leading engineering teams. Strong coaching skills, debugging ability and Verilog or VHDL design experience are required; SOC, communication protocols, Synopsys or Cadence tools and 28nm process experience are assets.
Verilog, VHDL, Synopsys, Cadence