Emplois “Cadence IC design tools” au Canada – Page 2

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• 28j

  Physical Design Engineer

  Markham, ON

  Temps plein

  AI

  AMD, Inc.

  Candidates need a bachelor's degree in an electrical, electronics or computer engineering discipline and deep experience in ASIC physical design implementation and signoff. They also need hands-on skill with industry EDA tools and power, performance and area optimization.

  Synopsys ICC2, Cadence Innovus, PrimeTime, Spyglass, RedHawk, Calibre

  28j

  SoC Lead Engineer – LEC & Low Power Signoff

  Markham, ON

  Temps plein

  AI

  AMD, Inc.

  Candidates need proven SoC implementation and tapeout experience, in-depth LEC and low power static verification skills, and hands-on use of Formality or Conformal, VC-LP or CLP, and Design Compiler or Fusion Compiler. Verilog, VHDL, UPF, Tcl, Perl and Python skills and a BS/MS in electrical engineering or a related field are also expected.

  Synopsys Formality, Cadence Conformal, Synopsys VC-LP, Cadence Conformal Low Power, Design Compiler, Fusion Compiler

• 28j

  IC design Implementation and SignOff Architect, (STA SignOff)

  Canada

  Temps plein

  C

  Cadence

  15+ ansCandidates need 15+ years of IC design implementation and signoff experience, deep advanced-node STA and ECO skills, and strong scripting in Tcl, Python or Perl. A BS or MS in electrical or computer engineering is required.

  Tempus, Certus, QRC

• 29j

  Business Development Manager (Canada)

  Ontario

  CG

  Covation Global

  4+ ansCandidates need 4+ years in business development, sales or commercial operations, ideally in consumer or sporting goods. Strong communication, account analysis skills, and comfort with Microsoft Office and e-commerce tools are needed.

  Microsoft Excel, Microsoft PowerPoint, Microsoft Word, Microsoft Outlook, CRM, Amazon

• 1 mois

  Senior Analog/mixed-signal IC Developer - Acacia - (Hybrid)

  Kanata, ON +1

  HybrideTemps plein

  

  Cisco Systems Canada Co.

  8+ ansCandidates need a BSEE or higher engineering degree with substantial experience designing, simulating and measuring high-speed ICs in at least three listed areas, such as serial links, data converters, PLLs and amplifiers.

  Cadence Virtuoso, Spectre, SpectreX, APS, Matlab, EMX

  1 mois

  Principal Analog/mixed-signal IC Developer - Acacia (Hybrid)

  Kanata, ON

  HybrideTemps plein

  

  Cisco Systems Canada Co.

  15+ ansCandidates need at least 15 years of related experience (or a master's with 10, or a PhD with 7) and hands-on design, simulation and measurement of high-speed ICs. They must have led a team on high-performance circuits.

  Cadence Virtuoso, Spectre, Calibre, EMX, Matlab

  1 mois

  Analog/mixed-signal IC Developer - Acacia (Hybrid)

  Kanata, ON +1

  HybrideTemps plein

  

  Cisco Systems Canada Co.

  8+ ansCandidates need a bachelor's with 8 years of related experience, a master's with 6, or a PhD with 3, plus hands-on experience designing, simulating and measuring high-speed ICs in at least three areas such as serial links, output drivers, PLLs, clock distribution, op-amps or equalization. Experience with FinFET/GAA technologies, high-frequency layout and Cadence tools is preferred.

  Cadence Virtuoso, Spectre, Calibre, EMX, Matlab

  1 mois

  Senior Analog/mixed-signal IC Designer - Acacia (Hybrid)

  Kanata, ON

  HybrideTemps plein

  

  Cisco Systems Canada Co.

  12+ ansCandidates need a BSEE with 12+ years, an MS with 8+ years, or a PhD with 5+ years of experience. They must have high-speed IC design experience in at least three listed areas, such as serial links, PLLs, or equalization.

  Cadence Virtuoso, Spectre, SpectreX, Calibre, EMX, Matlab

  1 mois

  Senior Mixed-Signal Designer - Acacia (Hybrid)

  Kanata, ON

  HybrideTemps plein

  

  Cisco Systems Canada Co.

  12+ ansCandidates need a bachelor's with 12 years, a master's with 8, or a PhD with 5 years of related experience, plus hands-on high-speed IC design across at least three areas such as SerDes, PLLs, clock distribution or equalization.

  Cadence Virtuoso, Spectre, Calibre, EMX, Matlab

• 1 mois

  Hardware Validation Engineer, Sr Staff

  Nepean, ON

  S

  Synopsys

  6+ ansCandidates need 6-8+ years of high-speed hardware design and validation experience and expert Cadence Allegro skills. They also need strong signal integrity knowledge, bench debugging experience and familiarity with JTAG, I2C, SPI and UART interfaces.

  Cadence Allegro, logic analyzer, oscilloscope, VNA, spectrum analyzer, protocol analyzer

• 1 mois

  FY27 Intern - Design Automation & Quality Assurance Engineering Intern - Canada (16 months)

  Toronto, ON

  Sur placeStage

  

  Qualcomm Canada ULC

  1+ ansCandidates need to be pursuing a bachelor's degree in electrical, computer or related engineering, with programming skill in at least one language such as Python. Strong problem-solving, attention to detail, teamwork and communication abilities are required.

  Python, Cadence Virtuoso, Siemens Calibre, Git, Linux

• 1 mois

  Manager I, Customer Success Manager

  Télétravail au Canada

  Télétravail

  

  Samsara: The company's mission is to increase the safety, efficiency, and sustainability of the operations that power the global economy.

  2+ ans2+ gestionCandidates need at least 2 years of people management, experience running a scaled or low-touch onboarding or account management program (SaaS preferred), and experience with a customer success CRM such as Gainsight or Totango. A bachelor's degree from a four-year institution is required.

  Gainsight, Totango, CRM, Product analytics platform, Digital engagement tools

• 1 mois

  3D IC and ADVANCED PACKAGING CAD ENGINEER

  Markham, ON

  Temps plein

  AM

  Advanced Micro Devices, Inc

  Candidates need a bachelor's or master's degree in computer or electrical engineering, experience with 3D-IC design and advanced packaging, and hands-on work with Synopsys 3DIC Compiler. Strong scripting skills and experience applying AI to CAD or hardware design are also needed.

  Synopsys 3DIC Compiler, Synopsys EDA tools, Cadence EDA tools, Linux/Unix, Python, TCL

  1 mois

  Physical Design Engineer

  Markham, ON

  Temps plein

  AM

  Advanced Micro Devices, Inc

  8+ ansCandidates need a bachelor's, master's or PhD in electrical, electronics or computer engineering, with 8, 4 or 2 years of physical design experience respectively. They need expertise in block-level place and route, timing closure, physical verification and power, performance and area optimization, plus hands-on debugging of EDA tools from Synopsys, Cadence and Siemens.

  Synopsys ICC2, Cadence Innovus, Synopsys PrimeTime, Spyglass, RedHawk, Calibre

  1 mois

  SoC Lead Engineer – LEC & Low Power Signoff

  Markham, ON

  Temps plein

  AM

  Advanced Micro Devices, Inc

  Advanced Micro Devices needs candidates with proven SoC implementation and tapeout experience, deep knowledge of equivalence checking and low power verification, and hands-on use of industry EDA tools. Strong scripting, debugging, leadership and communication skills are also required, along with a BS or MS in Electrical Engineering, ECE, EEE or a related field.

  Synopsys Formality, Cadence Conformal, Synopsys VC-LP, Cadence Conformal Low Power, Design Compiler, Fusion Compiler

• 1 mois

  Analog/mixed-signal IC Developer - Acacia (Hybrid)

  Kanata, ON +1

  Temps plein

  

  Cisco

  8+ ansCandidates need a bachelor's with 8 years, a master's with 6, or a PhD with 3 years of related experience, plus hands-on design, simulation and measurement of high-speed ICs in at least three areas such as SerDes, PLLs, output drivers, clock distribution, amplifiers and equalization.

  Cadence Virtuoso, Spectre, Calibre, EMX, Matlab

  1 mois

  Senior Mixed-Signal Designer - Acacia (Hybrid)

  Kanata, ON

  Temps plein

  

  Cisco

  5+ ansCandidates need a degree plus 5 to 12 years of related experience, depending on the degree level, and experience designing, simulating and measuring high-speed ICs across at least three of: SerDes, output drivers, PLLs, clock distribution, op-amps/PGAs or equalization. Experience with FinFET, layout and design tools is preferred.

  Cadence Virtuoso, Spectre/APS/SpectreX, Calibre, EMX, Matlab

  1 mois

  Principal Analog/mixed-signal IC Developer - Acacia (Hybrid)

  Kanata, ON

  Temps plein

  

  Cisco

  7+ ansCandidates need a Bachelor's with 15 years, a Master's with 10 years, or a PhD with 7 years of related experience. They must have high-speed IC design experience in at least three areas and have led a high-performance circuit team.

  Cadence Virtuoso, Calibre, EMX, Matlab

  1 mois

  Senior Analog/mixed-signal IC Designer - Acacia (Hybrid)

  Kanata, ON

  Temps plein

  

  Cisco

  12+ ansCisco candidates need 12+ years of experience with a BSEE, 8+ with an MS, or 5+ with a PhD. Experience in high-speed IC design in at least three areas such as SerDes, PLLs, output drivers, equalization and amplifiers is required.

  Cadence Virtuoso, Spectre, Calibre, EMX, Matlab

  1 mois

  Senior Analog/mixed-signal IC Developer - Acacia - (Hybrid)

  Kanata, ON +1

  Temps plein

  

  Cisco

  12+ ansCandidates need a BSEE with 12+ years of experience, or an equivalent MS or PhD background, plus hands-on design, simulation and measurement of high-speed ICs in at least three areas such as serial links, PLLs, drivers and data converters. Experience with FinFET technology, high-speed layout and Cadence Virtuoso is a plus.

  Cadence Virtuoso, Spectre, SpectreX, APS, Matlab, EMX

• 1 mois

  Sr. Memory Layout Engineer (7676)

  Ottawa, ON

  T

  TSMC

  8+ ansCandidates need a bachelor's or master's degree in a related field and 8+ years of advanced semiconductor memory layout experience. They need expertise with FinFET nodes, verification tools, custom layout CAD tools and scripting, and fluent written and spoken English.

  Cadence Virtuoso, Custom Compiler, Calibre, ICV, TCL, Cadence Skill

• 1 mois

  Analog and RF Layout Engineer

  Toronto, ON

  

  Capgemini

  6+ ansCandidates need 6+ years of analog and RF IC layout experience for high-speed applications, including advanced FinFET nodes (7nm and below). Hands-on use of Cadence, Mentor and Synopsys EDA tools and knowledge of floorplanning, routing and electromigration are required.

  Cadence, Mentor, Synopsys

  1 mois

  Analog and RF Layout Engineer

  Toronto, ON

  

  Capgemini

  6+ ansCandidates need 6+ years of analog, RF or mixed-signal IC layout experience, including advanced FinFET nodes at 7nm and below. They need hands-on skill with Cadence, Synopsys or Siemens EDA tools and strong knowledge of DRC, LVS and reliability constraints.

  Synopsys, Siemens EDA, Mentor Graphics

• 1 mois

  Silicon Photonics Layout Designer

  Ottawa, ON

  HybrideTemps plein

  R

  Ranovus

  3+ ansCandidates need a degree in electrical engineering, photonics, physics or a related field, and 3+ years of IC or photonic layout experience. Strong Cadence Virtuoso skills and experience running and debugging DRC and LVS are required.

  Cadence Virtuoso, DRC, LVS, PDK

12 entreprises