FrontEnd CMA (CAD) Engineer
Toronto, ONARM
Candidates need experience in ASIC/SoC build or front-end CAD, strong Python and Tcl skills, and knowledge of RTL, Verilog/SystemVerilog and verification methods such as Lint, CDC and formal. They also need experience building production CAD flows, a degree in electrical or computer engineering or computer science (or equivalent experience), and an AI-first approach to automation.
Python, Tcl, Shell, Linux, Verilog, SystemVerilog
Senior Director, SoC Power and Clocking Technology
Toronto, ONARM
20+ ansCandidates need a bachelor's degree in science or engineering, with a master's preferred, and 20+ years in SoC architecture and hardware design. At least 5 years architecting clock, reset, power and thermal solutions and leading a mid-size global team are required.
Leadership, Interpersonal skills, Control systems