ASIC Digital Design, Architect
Markham, ONSynopsys
10+ ansCandidates need a master's degree or equivalent experience and 10+ years of digital ASIC design, ideally in high-speed or mixed-signal work. They need strong Verilog or VHDL skills, clock domain crossing knowledge, synthesis and DFT experience, and experience working with verification teams.
Verilog, VHDL, synthesis tools, DFT tools
Analog Design, Manager - 18463
Kanata, ONSynopsys
8+ ans2+ gestionCandidates need an M.A.Sc. with 8+ years or a PhD with 6+ years of analog or mixed-signal IC design experience, plus 2+ years of people management. They must have deep Multi-Gbps SerDes expertise, transistor-level design skills, and experience with SPICE, Verilog-A and layout.
SPICE, Verilog-A, Industry-standard simulation tools
Project Engineering Management, Principal Engineer - 18617
Mississauga, ONSynopsys
8+ ansCandidates need an engineering or applied science degree (or equivalent) and 8+ years of semiconductor experience. Strong project management skills, customer communication experience, and knowledge of SOC, ASIC, Silicon IP, PCIe and Ethernet are expected.
Linux
ASIC Digital Design, Principal Engineer-18731
Mississauga, ONSynopsys
Candidates need extensive mixed-signal ASIC or IP verification experience, strong PCIe and PCIe PHY knowledge, and hands-on SystemVerilog and UVM skills. Strong debugging and mentoring abilities are also required.
SystemVerilog, UVM
ATE Test Engineer, Sr Staff Engineer - 18756
Nepean, ONSynopsys
8+ ansCandidates need 8+ years of silicon validation or ATE test experience and a degree in electrical engineering or a related field. They need strong knowledge of DDR, LPDDR and HBM protocols and JEDEC specifications, plus expertise with ATE platforms, oscilloscopes, BERTs and VB code.
Teradyne, Advantest, LTX, Credence, Introspect, oscilloscope
Validation / Verification Eng, Manager - 18754
Nepean, ONSynopsys
8+ ans3+ gestionCandidates need a Bachelor's degree in electrical engineering or a related field, 8+ years of memory interface silicon validation experience, and 3+ years managing engineering teams. Required skills include Python and C, JEDEC specifications, jitter and timing analysis, and ATE testers.
Oscilloscopes, BERT, Network analyzers, Teradyne ATE, Advantest ATE, LTX/Credence ATE
Silicon Validation Engineer
Mississauga, ONSynopsys
6+ ansCandidates need a Master's in electrical or electronics engineering with 6+ years of post-silicon validation experience, or a Bachelor's with 7+ years. Hands-on lab skill with BERTs, oscilloscopes, VNAs and TDRs, plus MATLAB and Python, is required.
BERT, real-time oscilloscope, sampling oscilloscope, VNA, TDR, MATLAB
Senior Staff Hardware Validation Engineer
Mississauga, ONSynopsys
6+ ansSynopsys needs a bachelor's degree in electrical or electronic engineering with 8 years of relevant experience, or a master's with 6 years. Candidates need lab test equipment experience, PCB fabrication house experience and skill running PI and SI simulations.
HFSS, high-speed scopes, power meters, IR cameras, FPGA development tools, Verilog HDL
Hardware Validation Senior Engineering Manager
Mississauga, ONSynopsys
10+ ans3+ gestionCandidates need a bachelor's degree in electrical or electronics engineering with 10+ years of experience, or a master's with 8+ years. They must have 3+ years managing engineers, full PCB design experience, and skill with signal simulation tools such as HFSS or ADS.
HFSS, ADS, oscilloscope, spectrum analyzer, power meter, thermal camera
System Level Test Engineer - 18758
Ottawa, ONSynopsys
3+ ansCandidates need a bachelor's or master's degree in electrical or computer engineering or a related field, plus 3 to 5 years of silicon validation or memory interface lab debug. They need hands-on bring-up experience, DRAM protocol knowledge, and Python scripting skills.
oscilloscope, logic analyzer, protocol analyzer, BERT, VNA, Power Analyzer
Silicon Validation/Characterization Engineer - 18757
Nepean, ONSynopsys
3+ ansCandidates need a Bachelor's or Master's in electrical or computer engineering or a related field, plus 3+ years of semiconductor validation or characterization experience. They need knowledge of DDR/LPDDR/HBM protocols and lab instruments, and skill in Python or C/C++ scripting.
oscilloscope, logic analyzer, power analyzer, SMU, pattern generator, Automated Test Equipment (ATE)
Analog Design, Sr Staff Engineer - 18597
Ottawa, ONSynopsys
7+ ansCandidates need an engineering or applied science degree and 7 to 12 years of semiconductor, Silicon IP or SoC experience. Strong project management, customer communication and cross-functional leadership skills are required, along with familiarity with Linux environments.
Linux
Hardware Validation Engineer, Sr Staff
Nepean, ONSynopsys
6+ ansCandidates need 6-8+ years of high-speed hardware design and validation experience and expert Cadence Allegro skills. They also need strong signal integrity knowledge, bench debugging experience and familiarity with JTAG, I2C, SPI and UART interfaces.
Cadence Allegro, logic analyzer, oscilloscope, VNA, spectrum analyzer, protocol analyzer
Sr Staff Package Design Engineer
Nepean, ONSynopsys
10+ ansCandidates need 10+ years of semiconductor package design or electrical modeling experience and a bachelor's degree in electrical or electronics engineering. They must have strong skills in circuit theory, 3D EM modeling in Ansys HFSS, and clear communication in English.
Ansys HFSS, EDA tools, Windows, Linux