AI Performance Engineer (Cloud AI Engineering), Sr | Staff | Sr. Staff
Markham, ONQualcomm Technologies, Inc.
5+ ansCandidates need hands-on experience building and optimizing language models in PyTorch and ONNX, a deep understanding of transformer architectures, and strong Python skills. A Master's degree in a related field and 5+ years of hardware, software or systems experience are required.
PyTorch, ONNX, Triton, Python, torch.compile, TorchDynamo
Near-Memory Compute System Validation Engineer
Markham, ONQualcomm Technologies, Inc.
3+ ansCandidates need a degree in engineering or computer science and several years of ASIC or silicon validation work. They need strong debugging skills, solid C/C++ and Python, and a good grasp of SoC architecture and memory systems.
JTAG, kernel debuggers, lab instrumentation, validation tools, FPGA, emulation platforms
LLM Serving Engineer (Cloud AI Engineering), Senior / Staff Engineer
Markham, ONQualcomm Technologies, Inc.
4+ ansCandidates need hands-on experience with LLM serving packages, strong PyTorch and Python skills, and solid computer science fundamentals. A bachelor's degree with 4+ years of experience, a master's with 3+ years, or a PhD with 2+ years is required.
PyTorch, Python, CUDA, Triton, vLLM, SGLang
PST Validation Engineer
Markham, ONQualcomm Technologies, Inc.
2+ ansCandidates need a bachelor's degree in science or engineering and 2+ years of ASIC design, verification or validation work, or a master's with 1+ year. They need knowledge of mobile chip architecture, regression and PVT testing, and C and Python programming.
Lauterbach Trace32, JTAG, Python, C
DDR Validation Lead, Staff (AI Accelerator Platform)
Markham, ONQualcomm Technologies, Inc.
5+ ansCandidates need at least 5 years in DDR or memory subsystem validation or silicon bring-up, plus knowledge of LPDDR architectures, memory controllers and PHYs, and strong post-silicon debug skills. Qualcomm also requires a bachelor's, master's or PhD and C/C++ proficiency.
emulation platforms, FPGA, C, C++
Emulation Performance/Debug Engineer
Markham, ONQualcomm Technologies, Inc.
2+ ansCandidates need a bachelor's degree in science or engineering with 2+ years of ASIC work, or a master's with 1+ year. Experience with emulation platforms, Verilog/SystemVerilog, C, Python, TCL and FPGA timing closure is preferred.
Veloce, Palladium, Xilinx FPGA, Intel FPGA, JTAG, Python
Pre-Silicon Validation Engineer
Markham, ONQualcomm Technologies, Inc.
Candidates need a Bachelor's or Master's degree in an engineering, computer science or related field, 0-2+ years in ASIC verification, FPGA prototyping or hardware emulation, and strong skills in SystemVerilog, C/C++, Linux, and Python. Experience with RTL debugging and SoC architectures is also required.
SystemVerilog, C/C++, Python, Linux, Cadence Palladium, Siemens Veloce
SoC Clock & Power Management Validation Lead, Staff (AI Accelerator Platform)
Markham, ONQualcomm Technologies, Inc.
5+ ansQualcomm Technologies needs candidates with a bachelor's degree in engineering and 5+ years in SoC validation or related areas. They must know clock or power validation, C and Python, lab instruments such as oscilloscopes, and JTAG debug on ARM-based SoCs.
Oscilloscope, Logic analyzer, Multimeter, Python, C, Perl
EDA/CAD Software Engineer, Staff
Markham, ONQualcomm Technologies, Inc.
7+ ansCandidates need a bachelor's degree in science or engineering with 7+ years of related experience, or the equivalent advanced degree with fewer years. Strong C++, Linux, CAD software development and VLSI or ASIC design skills are preferred.
Git, LSF, JIRA, GCC