Analog Design, Principal Engineer- 18339
Markham, ONSynopsys
8+ ansCandidates need 8+ years of CMOS analog or mixed-signal design experience and strong expertise in transistor-level and SerDes circuits. Hands-on FinFET layout, SPICE and scripting skills, and knowledge of reliability and ESD design are also required.
SPICE simulators, EDA tools, Python, TCL
R&D Engineering, Staff Engineer
Vancouver, BCSynopsys
5+ ansCandidates need a bachelor's degree in a technical field and 5+ years of software development (3+ with a master's or PhD). Strong C++ skills, performance optimization and GPU experience such as CUDA or OpenCL are needed.
C++, CUDA, OpenCL
Analog Design, Sr Architect - 18729
Markham, ONSynopsys
12+ ansCandidates need at least 12 years of related experience in high-speed interfaces and mixed-signal design. They also need skills in custom analog design, simulation, verification, debugging, and writing technical specifications.
Documentation, Communication skills, Troubleshooting, Debugging
Principal SI/PI Engineer - 18619
Mississauga, ONSynopsys
12+ ansCandidates need a bachelor's degree (master's or PhD preferred) in electrical engineering and 12+ years of high-speed SI/PI experience on SerDes links. They also need strong skills in simulation tools, lab measurement and scripting, plus proven technical leadership.
HSPICE, Keysight ADS, SystemVue, Ansys HFSS, SIwave, AEDT
Pre-Silicon Signoff Lead
Mississauga, ONSynopsys
10+ ansCandidates need an MSc or PhD in electrical or computer engineering and 10+ years of industry experience. They need deep knowledge of PCIe and Ethernet, SystemVerilog, UVM and scripting, plus proven leadership and mentoring skills.
SystemVerilog, UVM, Python, TCL, Perl, C++
Firmware Engineering Manager
Nepean, ONSynopsys
Synopsys needs candidates with a degree in computer science, electronics or a related field, and proven experience as a tech lead or engineering manager of embedded firmware teams. They must write production C for resource-constrained systems, debug RTL waveforms, and mentor engineers while communicating well with customers and stakeholders.
Firmware, Leadership, Coaching, Team leadership, RTL, Lead a team
Project Engineering Management, Principal Engineer - 18617
Mississauga, ONSynopsys
8+ ansCandidates need an engineering or applied science degree (or equivalent) and 8+ years of semiconductor experience. Strong project management skills, customer communication experience, and knowledge of SOC, ASIC, Silicon IP, PCIe and Ethernet are expected.
Linux
ASIC Digital Design, Principal Engineer-18731
Mississauga, ONSynopsys
Candidates need extensive mixed-signal ASIC or IP verification experience, strong PCIe and PCIe PHY knowledge, and hands-on SystemVerilog and UVM skills. Strong debugging and mentoring abilities are also required.
SystemVerilog, UVM
Validation / Verification Eng, Manager - 18754
Nepean, ONSynopsys
8+ ans3+ gestionCandidates need a Bachelor's degree in electrical engineering or a related field, 8+ years of memory interface silicon validation experience, and 3+ years managing engineering teams. Required skills include Python and C, JEDEC specifications, jitter and timing analysis, and ATE testers.
Oscilloscopes, BERT, Network analyzers, Teradyne ATE, Advantest ATE, LTX/Credence ATE
System Level Test Engineer - 18758
Ottawa, ONSynopsys
3+ ansCandidates need a bachelor's or master's degree in electrical or computer engineering or a related field, plus 3 to 5 years of silicon validation or memory interface lab debug. They need hands-on bring-up experience, DRAM protocol knowledge, and Python scripting skills.
oscilloscope, logic analyzer, protocol analyzer, BERT, VNA, Power Analyzer
Silicon Validation/Characterization Engineer - 18757
Nepean, ONSynopsys
3+ ansCandidates need a Bachelor's or Master's in electrical or computer engineering or a related field, plus 3+ years of semiconductor validation or characterization experience. They need knowledge of DDR/LPDDR/HBM protocols and lab instruments, and skill in Python or C/C++ scripting.
oscilloscope, logic analyzer, power analyzer, SMU, pattern generator, Automated Test Equipment (ATE)
Analog Design, Sr Staff Engineer - 18597
Ottawa, ONSynopsys
7+ ansCandidates need an engineering or applied science degree and 7 to 12 years of semiconductor, Silicon IP or SoC experience. Strong project management, customer communication and cross-functional leadership skills are required, along with familiarity with Linux environments.
Linux
Project Engineering Management, Principal Engineer
Mississauga, ONSynopsys
10+ ansCandidates need an engineering degree or equivalent experience, 10+ years of customer-facing project management, and familiarity with mixed-signal IP, SoC or ASIC development. Strong communication, MS Project, Jira, UNIX/Linux and quality management system knowledge are also required.
MS Project, Jira, UNIX, Linux
Sr Staff Package Design Engineer
Nepean, ONSynopsys
10+ ansCandidates need 10+ years of semiconductor package design or electrical modeling experience and a bachelor's degree in electrical or electronics engineering. They must have strong skills in circuit theory, 3D EM modeling in Ansys HFSS, and clear communication in English.
Ansys HFSS, EDA tools, Windows, Linux
Sr Staff PCB Design Engineer
Markham, ONSynopsys
10+ ansCandidates need 10+ years of high-speed PCB design or signal integrity experience and strong circuit and transmission line theory. They also need hands-on 3D electromagnetic modelling experience with Ansys HFSS or similar tools, plus a Bachelor's degree in electrical or electronics engineering.
Ansys HFSS, PCB layout tools, Windows, Linux
ASIC Digital Verification, Sr. Manager
Mississauga, ONSynopsys
15+ ansCandidates need a BS or MS in EE, EC or VLSI with 15+ years of IP or SoC verification experience, and strong team leadership. They must know Verilog, SystemVerilog and UVM, and Perl or Python automation. PCIe and Ethernet knowledge is an asset.
Verilog, SystemVerilog, UVM, Perl, Python