ASIC Digital Design, Principal Engineer-18731
Mississauga, ONSynopsys
Candidates need extensive mixed-signal ASIC or IP verification experience, strong PCIe and PCIe PHY knowledge, and hands-on SystemVerilog and UVM skills. Strong debugging and mentoring abilities are also required.
SystemVerilog, UVM
Principal SerDes Architect
Mississauga, ONSynopsys
10+ ansCandidates need 10+ years in high-speed analog, SerDes or optical communications, with knowledge of IEEE 802.3, OIF and PCIe optical specifications. A BS or MS in Electrical Engineering, Physics or a related field is required, and a PhD is preferred.
ICT system integration, Troubleshooting, Regulatory compliance, Optical components, Photonics, Documentation
ATE Test Engineer, Sr Staff Engineer - 18756
Nepean, ONSynopsys
8+ ansCandidates need 8+ years of silicon validation or ATE test experience and a degree in electrical engineering or a related field. They need strong knowledge of DDR, LPDDR and HBM protocols and JEDEC specifications, plus expertise with ATE platforms, oscilloscopes, BERTs and VB code.
Teradyne, Advantest, LTX, Credence, Introspect, oscilloscope
Validation / Verification Eng, Manager - 18754
Nepean, ONSynopsys
8+ ans3+ gestionCandidates need a Bachelor's degree in electrical engineering or a related field, 8+ years of memory interface silicon validation experience, and 3+ years managing engineering teams. Required skills include Python and C, JEDEC specifications, jitter and timing analysis, and ATE testers.
Oscilloscopes, BERT, Network analyzers, Teradyne ATE, Advantest ATE, LTX/Credence ATE
Silicon Validation Engineer
Mississauga, ONSynopsys
6+ ansCandidates need a Master's in electrical or electronics engineering with 6+ years of post-silicon validation experience, or a Bachelor's with 7+ years. Hands-on lab skill with BERTs, oscilloscopes, VNAs and TDRs, plus MATLAB and Python, is required.
BERT, real-time oscilloscope, sampling oscilloscope, VNA, TDR, MATLAB
Silicon Validation Software Engineer (Sr Staff)
Mississauga, ONSynopsys
8+ ansCandidates need 8+ years of software development in silicon validation or hardware test (or a master's with 6+ years), strong Python skills, and experience deploying validation tools. Git or GitLab, hardware debugging across the stack and lab experience are also needed.
Python, Git, GitLab, JTAG, I2C, SPI
System Level Test Engineer - 18758
Ottawa, ONSynopsys
3+ ansCandidates need a bachelor's or master's degree in electrical or computer engineering or a related field, plus 3 to 5 years of silicon validation or memory interface lab debug. They need hands-on bring-up experience, DRAM protocol knowledge, and Python scripting skills.
oscilloscope, logic analyzer, protocol analyzer, BERT, VNA, Power Analyzer
Silicon Validation/Characterization Engineer - 18757
Nepean, ONSynopsys
3+ ansCandidates need a Bachelor's or Master's in electrical or computer engineering or a related field, plus 3+ years of semiconductor validation or characterization experience. They need knowledge of DDR/LPDDR/HBM protocols and lab instruments, and skill in Python or C/C++ scripting.
oscilloscope, logic analyzer, power analyzer, SMU, pattern generator, Automated Test Equipment (ATE)
Analog Design, Sr Staff Engineer - 18597
Ottawa, ONSynopsys
7+ ansCandidates need an engineering or applied science degree and 7 to 12 years of semiconductor, Silicon IP or SoC experience. Strong project management, customer communication and cross-functional leadership skills are required, along with familiarity with Linux environments.
Linux
Hardware Validation Engineer, Sr Staff
Nepean, ONSynopsys
6+ ansCandidates need 6-8+ years of high-speed hardware design and validation experience and expert Cadence Allegro skills. They also need strong signal integrity knowledge, bench debugging experience and familiarity with JTAG, I2C, SPI and UART interfaces.
Cadence Allegro, logic analyzer, oscilloscope, VNA, spectrum analyzer, protocol analyzer
Sr Staff Package Design Engineer
Nepean, ONSynopsys
10+ ansCandidates need 10+ years of semiconductor package design or electrical modeling experience and a bachelor's degree in electrical or electronics engineering. They must have strong skills in circuit theory, 3D EM modeling in Ansys HFSS, and clear communication in English.
Ansys HFSS, EDA tools, Windows, Linux
Sr Staff PCB Design Engineer
Markham, ONSynopsys
10+ ansCandidates need 10+ years of high-speed PCB design or signal integrity experience and strong circuit and transmission line theory. They also need hands-on 3D electromagnetic modelling experience with Ansys HFSS or similar tools, plus a Bachelor's degree in electrical or electronics engineering.
Ansys HFSS, PCB layout tools, Windows, Linux