FY27 Intern - Display IP FPGA Emulation Intern - Canada (4 months)
Markham, ONQualcomm Canada ULC
1+ ansCandidates need to be in study toward a bachelor's degree in computer engineering, engineering science, computer science or a related field, with at least one year of academic programming experience. Knowledge of RTL, Verilog or SystemVerilog, digital design and Linux is required, plus teamwork and communication skills.
FPGA, Verilog, Linux, Perl, Python, TCL
GPU Design Verification Engineer
Markham, ONQualcomm Canada ULC
2+ ansCandidates need a relevant engineering or computer science degree plus years of hardware or software experience, depending on degree level. They need SystemVerilog, UVM, C/C++ and verification skills such as test planning, simulation and debug.
UVM, Veloce, Palladium, Zebu, FPGA, Python
Optical Systems Validation Engineer
Ottawa, ONQualcomm Canada ULC
Candidates need a bachelor's degree in science or engineering and knowledge of electrical or optical test methods. Experience with lab instruments for SerDes testing, plus Python and Git, is required.
Oscilloscopes, BERT, Signal analyzers, VNA, AWG, VOA
Engineer
Toronto, ONQualcomm Canada ULC
1+ ansCandidates need a bachelor's degree in engineering, information systems, computer science or a related field. Preferred experience includes programming in C, C++, Java or Python, database management, APIs, and source code management with Git or Perforce.
Git, Perforce
FY27 Intern - Qualcomm SoC Engineering Internship - Canada (16 months)
Markham, ONQualcomm Canada ULC
1+ ansQualcomm Canada ULC needs students pursuing a Bachelor's or Master's in electrical or computer engineering, computer science or AI/ML, available May or June 2027 to August or September 2028. Candidates need strong programming skills in C, C++ or Python and digital logic fundamentals.
Verilog, SystemVerilog, EDA tools
Analog Engineer, Staff
Toronto, ONQualcomm Canada ULC
4+ ansCandidates need a bachelor's, master's or PhD in electrical engineering with analog or mixed-signal CMOS design experience and several years of ASIC design or verification work. Experience with circuit design tools, transistor-level design, layout optimization and silicon-proven analog blocks is required.
Cadence ADE, MATLAB, SPICE, Verilog-A, Verilog, VHDL