Principal Digital Verification Engineer
Nepean, ONSynopsys
12+ ansSynopsys candidates need 12+ years of verification experience with a BSc, 10+ years with an MSc, or 8+ years with a PhD. They need deep SystemVerilog and UVM skills, simulation and waveform debugging, C knowledge, assertion-based verification, and Linux scripting. Experience with LPDDR5/5X or LPDDR6 and emulation platforms is a plus.
SystemVerilog, UVM, waveform debugger, Linux, source control, emulation platform
Silicon Validation Software Engineer (Sr Staff)
Mississauga, ONSynopsys
8+ ansCandidates need 8+ years of software development in silicon validation or hardware test (or a master's with 6+ years), strong Python skills, and experience deploying validation tools. Git or GitLab, hardware debugging across the stack and lab experience are also needed.
Python, Git, GitLab, JTAG, I2C, SPI
Hardware Validation Engineer, Sr Staff
Nepean, ONSynopsys
6+ ansCandidates need 6-8+ years of high-speed hardware design and validation experience and expert Cadence Allegro skills. They also need strong signal integrity knowledge, bench debugging experience and familiarity with JTAG, I2C, SPI and UART interfaces.
Cadence Allegro, logic analyzer, oscilloscope, VNA, spectrum analyzer, protocol analyzer