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Solidigm: Solidigm is a leading global provider of innovative NAND flash memory solutions.
10+ ansCandidates need a bachelor's degree in electrical or computer engineering or computer science, strong debugging skills, digital logic design experience in advanced technology nodes, and verification experience with UVM or FPV. Preferred candidates have 10+ years of ASIC/SoC experience and familiarity with NVMe, PCIe, DDR or ARM standards.
Verilog, VHDL, SystemVerilog, UVM, Jira, Confluence
Arista Networks
3+ ansCandidates need a BSc, MS or PhD in Computer Science, Electrical or Computer Engineering with 3+ years of related experience. They should know C or C++, Python, and UNIX or Linux, and show strong problem-solving skills.
C, C++, Python, Linux, UNIX
Arista Networks
8+ ansCandidates need a computer science or engineering degree with 8 years of experience (or a shorter period with a master's or PhD), expert skills in C, C++ and Python, and experience with Linux and hardware device drivers. Strong troubleshooting skills and the ability to work in small teams are also needed.
C, C++, Python, Linux, UNIX, FPGA
Microchip - USA
10+ ansCandidates need a bachelor's in electrical engineering with at least 10 years of mixed-signal CMOS design experience, or a master's with 7.5 years. Strong SERDES or PLL experience and simulator skills in HSPICE or Spectre are expected.
HSPICE, Spectre
EnCharge AI
EnCharge AI needs a candidate with a Bachelor's in EE or CS, advanced C/C++ skills for operating system kernel and systems work, and a deep understanding of operating systems, computer architecture and memory management. Strong verbal and written communication is required.
C, C++, RISC-V, PCIe, IOMMU
Tenstorrent: Tenstorrent is a next-generation computing company that builds computers for AI.
Candidates need extensive PCIe experience across hardware, software and systems, including link training, enumeration and error recovery. They also need low-level firmware skills, hands-on lab debugging with oscilloscopes and protocol analyzers, and knowledge of UEFI/BIOS, drivers, DMA and IOMMUs.
oscilloscope, protocol analyzer, exerciser, JTAG, trace tools
NUVACORE
20+ ansCandidates need 20+ years of SoC or system architecture experience from definition through production. Deep knowledge of coherent interconnects, cache hierarchies, DDR/LPDDR memory controllers, PCIe/CXL and die-to-die links is required, along with an MS or PhD or equivalent experience.
Scheduling, Translation, Packaging, RTL, Firmware, Communication skills
Astera Labs: Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions.
10+ ansAstera Labs needs a candidate with 10+ years in ASIC or SoC development, including 3+ years in technical program management. Candidates need hands-on knowledge of the chip design flow, EDA and CAD tools, and pre-silicon validation.
CAD infrastructure, Emulation platforms, FPGA prototyping platforms
Astera Labs: Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions.
2+ ansCandidates need a bachelor's degree in electrical or electronics engineering, 2 to 5 years of digital design experience on complex chips, and hands-on SystemVerilog or Verilog RTL skills. PCIe or Ethernet IP experience and Python or Perl scripting are also required, and candidates must be authorized to work in Canada.
SystemVerilog, Verilog, Synopsys, Cadence, Python, Perl
Astera Labs: Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions.
2+ ansCandidates need a bachelor's degree in electrical engineering or a related field and 2 to 5 years of verifying complex chips. Hands-on SystemVerilog, UVM and C/C++ experience, including C/C++ integration with SystemVerilog, is required, as is authorization to work in Canada.
SystemVerilog, UVM, C/C++, Python, Perl, FPGA emulation platform
Ethernovia, Inc.
10+ ansCandidates need a BS or MS in electrical engineering, computer science or a related field and 10+ years of ASIC RTL design or architecture experience. They must have built complex SoCs, know Verilog/SystemVerilog and simulation tools, and work well both independently and in teams.
Verilog, Perl, TCL, C/C++, Make
Ethernovia, Inc.
10+ ansCandidates need a BS or MS in electrical engineering, computer science or a related field, and at least 10 years of ASIC verification experience. Required skills include SystemVerilog, UVM, Python, TCL and C/C++, plus strong debugging and communication abilities.
Verilog, UVM, Python, TCL, C/C++, SystemC
14 entreprises