RTL Design Engineer
Markham, ONAMD, Inc.
AMD needs candidates with a Bachelor's or Master's degree in an electrical, computer or related engineering field, with Master's preferred. Strong skills in Verilog, SystemVerilog and scripting such as Python, Tcl or Perl are expected, along with knowledge of processor subsystems and ASIC design flows.
Verilog, SystemVerilog, Python, Tcl, Perl, Ruby
RTL Design Engineer
Markham, ONAMD, Inc.
Candidates need a strong background in RTL design, Verilog and SystemVerilog, and scripting in Python, Tcl, Perl, Ruby, or Make. Experience with AXI, AHB, AMBA protocols, ASIC design tools, and a Bachelor's or Master's degree in electrical or computer engineering are expected.
Verilog, SystemVerilog, C-DPI, FPGA, ASIC simulation and synthesis tools
ASIC Design Engineer, PCIe IP Enablement
Markham, ONAMD, Inc.
Candidates need hands-on ASIC hardware design experience with end-to-end ownership of complex digital IP through tape-out. Strong RTL and Verilog skills, synthesis and CDC tool experience, and knowledge of low-power design are expected.
Verilog, UPF, CPF
GPU Design Verification Engineer
Markham, ONAMD, Inc.
Candidates need IP-level ASIC verification experience, UVM testbench skills, and knowledge of SystemVerilog, Verilog, C/C++ and scripting in Python, Perl or shell. A Bachelor's or Master's in computer or electrical engineering is preferred.
UVM, Verilog, C++, Python, Perl, Makefile
Summer 2027 Long Term Hardware Design Verification Engineering Intern/Co-Op
Markham, ONAMD, Inc.
Candidates need to be enrolled in a Canadian university bachelor's program in electrical, computer or a related engineering field. They should have programming experience in C++, Python, Perl or UVM, familiarity with Verilog or SystemVerilog, and knowledge of digital logic and Linux, Unix or Windows.
Verilog, Perl, Python, MySQL, PHP
Short Term 2027 Hardware Design Verification Engineering Intern/Co-Op
Markham, ONAMD, Inc.
Candidates need to be enrolled in a Canadian university Bachelor's program in electrical engineering, computer science, computer engineering or a related field. Experience with programming (C++, Python, C, Perl, UVM), Verilog/SystemVerilog and digital logic design is strongly encouraged.
Perl, Python, MySQL, PHP, Verilog, UVM
Short Term 2027 Hardware Design Verification Engineering Intern/Co-Op
Vancouver, BCAMD, Inc.
Candidates need to be enrolled in a Canadian university Bachelor's program in electrical engineering, computer science, computer engineering or a related field. Experience with C++, Python, Perl, UVM, Verilog and SystemVerilog, digital systems, and Linux/Unix/Windows is preferred.
Verilog, UVM, Perl, Python, MySQL, PHP