Emplois “System Verilog” au Canada

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• 10h

  FPGA Development Tools Engineer

  Toronto, ON

  Temps plein

  AS

  Altera Semiconductor Technology Canada ULC

  1+ ansCandidates need at least one year of software development experience in a hardware or silicon setting, using C/C++, Java or Python/Perl/Tcl, plus a bachelor's degree in computer engineering, electrical engineering, computer science or a related field. Preferred skills include data structures and algorithms, build systems, RTL design, EDA and FPGA tools, and version control.

  Quartus, Perforce, Git, CVS, makefiles

  16h

  FPGA Design Verification Intern

  Toronto, ON

  Temps plein

  AS

  Altera Semiconductor Technology Canada ULC

  Candidates need to be pursuing a bachelor's degree in computer engineering, engineering science, computer science, math, electrical engineering or equivalent, with at least 3 months of digital hardware design or verification experience and 3 months of software or scripting experience. Familiarity with FPGA tools such as Quartus and strong problem-solving skills are preferred.

  Quartus, Verilog, VHDL, C++, Python

• 12h

  AMS Design Verification Engineer

  Mississauga, ON

  S

  Synopsys

  5+ ansSynopsys needs candidates with a degree in electrical or computer engineering and strong knowledge of analog and mixed-signal circuits. Candidates should know SystemVerilog and UVM, have used AMS simulation tools, and be comfortable scripting in Python, Perl or shell.

  HSPICE, XA, CustomSim, VCS, SystemVerilog, UVM

  4j

  Principal Analog Mixed Signal Designer - 19497

  Mississauga, ON

  S

  Synopsys

  5+ ansCandidates need a PhD with 5+ years or a Master's with 8+ years of hands-on analog IC design experience. Strong CMOS skills, detailed SerDes sub-circuit design experience and SPICE simulation expertise are required.

  SPICE simulators, Verilog-A, schematic entry tools, physical layout tools, MATLAB, Python

• 16h

  Senior Control Algorithm & System Architecture Engineer

  Ottawa, ON

  Sur placeTemps plein

  R

  Ranovus

  8+ ansCandidates need an MSc in electrical engineering with 8+ years or a PhD with 5+ years in digital or mixed-signal verification using SystemVerilog. They need understanding of feedback control, hardware bring-up and basic photonic components, plus Python or MATLAB skills.

  SystemVerilog, Verilog-A, Python, MATLAB, SPICE

• 1j

  Senior Director, Engineering

  Télétravail au Canada

  TélétravailTemps plein

  

  Jobgether

  10+ ansCandidates need an engineering degree, 10+ years of embedded memory design experience with production tapeouts, and deep circuit-design and SPICE expertise. Proven engineering leadership, customer-facing technical experience and strong communication skills are also required.

  SPICE, FastSPICE, Tessent, FastScan, RedHawk, Python

• 1j

  Senior Director, Engineering

  Télétravail au Canada

  TélétravailTemps plein

  S

  Silvaco

  10+ ansCandidates need 10+ years of embedded memory design experience with production tapeouts of SRAM and other memory types, plus deep circuit design and advanced-node expertise. Strong team leadership over 6+ memory designers and customer-facing technical experience are required, along with a BS, MS or PhD in an engineering field.

  SPICE, FastSPICE, Tessent, FastScan, RedHawk, Python

• 3j

  Concepteur Senior ASIC Baseband｜Senior ASIC Baseband Designer

  Montréal, QC

  HybrideTemps plein

  SM

  SPARK Microsystems International Inc

  10+ ansCandidates need an electrical or computer engineering degree and more than 10 years of ASIC or FPGA design experience with digital baseband or wireless signal processing. Required skills include RTL design in VHDL, Verilog or SystemVerilog and knowledge of digital communication systems.

  VHDL, Verilog, SystemVerilog, ModelSim, VCS, FPGA

• 3j

  Sr/Staff Digital Design Engineer

  Toronto, ON

  

  Lightmatter

  5+ ansLightmatter needs candidates with a bachelor's degree in electrical or computer engineering and at least 5 years of ASIC or high-speed chip design experience, including multiple successful tape-outs. Candidates must know SystemVerilog or Verilog and have proven experience debugging logic and mixed-signal simulations.

  SystemVerilog, Verilog, Synopsys VCS, Cadence Xcelium, Questa

• 4j

  FY27 Intern - Digital Design Engineering Intern - Canada (16 months)

  Toronto, ON

  Sur placeStage

  

  Qualcomm Canada ULC

  Candidates need to be working toward a bachelor's degree in engineering, computer science or a related field, with strong digital design fundamentals. Verilog or VHDL knowledge and scripting in Perl, Python or TCL are required, with DFT concepts, Tessent, C/C++ or SystemVerilog as assets.

  Verilog, VHDL, Perl, Python, TCL, Siemens Tessent

  4j

  FY27 Intern - RF/Analog Verification Engineering Internship - Canada (4 or 16 months)

  Markham, ON

  Sur placeStage

  

  Qualcomm Canada ULC

  1+ ansCandidates need to be enrolled in a bachelor's, master's or PhD program in electrical, computer or computer science, with VLSI or RF/analog design coursework. Machine learning application experience and programming skills in Python or C++ are required.

  SystemVerilog, UVM, Python, C++, PyTorch, TensorFlow

  5j

  FY27 Intern - Display IP FPGA Emulation Intern - Canada (4 months)

  Markham, ON

  Sur placeStage

  

  Qualcomm Canada ULC

  1+ ansCandidates need to be in study toward a bachelor's degree in computer engineering, engineering science, computer science or a related field, with at least one year of academic programming experience. Knowledge of RTL, Verilog or SystemVerilog, digital design and Linux is required, plus teamwork and communication skills.

  FPGA, Verilog, Linux, Perl, Python, TCL

  5j

  GPU Design Verification Engineer

  Markham, ON

  Sur place

  

  Qualcomm Canada ULC

  2+ ansCandidates need a relevant engineering or computer science degree plus years of hardware or software experience, depending on degree level. They need SystemVerilog, UVM, C/C++ and verification skills such as test planning, simulation and debug.

  UVM, Veloce, Palladium, Zebu, FPGA, Python

  8j

  FY27 Intern - Qualcomm SoC Engineering Internship - Canada (16 months)

  Markham, ON

  Sur placeStage

  

  Qualcomm Canada ULC

  1+ ansQualcomm Canada ULC needs students pursuing a Bachelor's or Master's in electrical or computer engineering, computer science or AI/ML, available May or June 2027 to August or September 2028. Candidates need strong programming skills in C, C++ or Python and digital logic fundamentals.

  Verilog, SystemVerilog, EDA tools

  8j

  FY27 Intern - Digital Design Engineering Internship - Canada (16 months)

  Toronto, ON

  Sur placeStage

  

  Qualcomm Canada ULC

  1+ ansCandidates need to be enrolled in a bachelor's program in electrical or computer engineering, computer science or a related field, with graduation in November 2028 or later. Experience with Verilog or SystemVerilog, RTL design and at least one year of programming in C, C++ or Python is required, with FPGA or tapeout experience as a plus.

  Verilog, SystemVerilog, FPGA, EDA tools

  8j

  FY27 Intern - Design Verification Engineering Internship - Canada (16 months)

  Toronto, ON

  Sur placeStage

  

  Qualcomm Canada ULC

  1+ ansCandidates need to be enrolled in a bachelor's program in electrical, computer or engineering science, or a related field, with an expected graduation of November 2028 or later. They need at least one year of academic programming experience in C, C++ or Python, and are preferred with Verilog/SystemVerilog and verification methodology knowledge.

  Synopsys VCS, Verdi, SystemVerilog, Verilog, UVM

  8j

  Analog Engineer, Staff

  Toronto, ON

  Sur place

  

  Qualcomm Canada ULC

  4+ ansCandidates need a bachelor's, master's or PhD in electrical engineering with analog or mixed-signal CMOS design experience and several years of ASIC design or verification work. Experience with circuit design tools, transistor-level design, layout optimization and silicon-proven analog blocks is required.

  Cadence ADE, MATLAB, SPICE, Verilog-A, Verilog, VHDL

  9j

  FY27 Intern - Soft IP ASIC Engineering Internship - Canada (12 or 16 months)

  Ottawa, ON

  Sur placeStage

  

  Qualcomm Canada ULC

  1+ ansQualcomm Canada needs candidates studying toward a bachelor's degree in electrical, computer or engineering science, or computer science. They need scripting experience in Python, Perl, TCL or Unix/Linux shell, plus source control experience with SVN, CVS or RCS.

  Verilog, SystemVerilog, UVM, SVN, CVS, RCS

  9j

  Senior Director, Technology

  Ottawa, ON

  Sur place

  

  Qualcomm Canada ULC

  10+ ansCandidates need a bachelor's in electrical engineering with 10 years of ASIC or IP development experience, or a master's with 8 years. They also need hands-on knowledge of Ethernet, UALink and OTN, HDL languages, SystemVerilog UVM and verification methods.

  SystemVerilog, Verilog, VHDL, UVM, Unix/Linux, SVN

  9j

  FY27 Intern - Softip Engineering Co-Op - Canada (4 months)

  Ottawa, ON

  Sur placeStage

  

  Qualcomm Canada ULC

  1+ ansCandidates need to be enrolled in a bachelor's or master's program in electrical, computer or related engineering, with scripting experience in Python, Perl, TCL or Unix/Linux shell and experience with source code revision systems.

  Verilog, SystemVerilog, UVM, VHDL, SVN, CVS

• 5j

  Principal/Team Lead, Digital Verification Engineer (FEC)

  Ottawa, ON

  137k–218k $/anTemps plein

  CC

  Ciena Canada ULC

  10+ ansCandidates need 10+ years of verification experience and a bachelor's degree in electrical, computer or software engineering. They must have strong skills in C/C++, SystemVerilog, UVM and SVA, and show leadership and communication ability.

  UVM, C++, Jira, Git, Python

• 5j

  GPU Validation Engineer

  Toronto, ON

  Temps plein

  IT

  Intel Technology India Pvt. Ltd.

  8+ ansCandidates need a bachelor's degree in a STEM field and 8+ years of industry experience in SystemVerilog/UVM pre-silicon validation and SoC verification of Design for Debug, fabric, boot, reset and power management. A master's degree plus 6+ years of experience is an equivalent path, and GPU pre-silicon validation experience is a plus.

  UVM

• 7j

  Lead Digital Verification Engineer

  Montréal, QC

  Temps plein

  C

  Cadence

  Candidates need a Bachelor's degree in electrical, computer engineering or computer science, plus knowledge of verification methodologies, metric driven verification, UVM, SystemVerilog assertions and the digital design flow. A Master's degree, UVM coding experience, scripting skills and protocol knowledge such as PCIe, USB or Ethernet are preferred.

  SystemVerilog, UVM, Python, Perl, Cadence tools

• 8j

  Concepteur.trice FPGA

  Montréal, QC

  Sur placeTemps plein

  

  Go RH

  5+ ansCandidates need a bachelor's degree in electrical or computer engineering, 5+ years of relevant experience, and FPGA design experience. They must know VHDL, Verilog or SystemVerilog, FPGA tools such as Vivado or Quartus, and digital communication protocols, and speak French and English.

  Xilinx Vivado, Intel Quartus, Altium Designer

12 entreprises