ML Systems Performance Engineer
CanadaCerebras Systems
3+ ansCandidates need a Bachelor's, Master's or PhD in Electrical Engineering or Computer Science, strong computer architecture knowledge and 3+ years in a relevant domain such as CPU/GPU performance or kernel optimization. Experience with simulators, performance profiling, C++ and Python is required.
C++, Python, CPU/GPU simulators, Wafer Scale Engine, profiling tools
Software Engineer, GPU Inference
Toronto, ONCerebras Systems
5+ ansCerebras Systems needs candidates with 5+ years of software engineering experience, including production inference work for large models. Strong C++ and Python, hands-on serving framework experience such as vLLM, and deep GPU performance knowledge are required.
vLLM, ROCm, PyTorch, Kubernetes, AMD Instinct GPUs, RCCL
Senior Runtime Engineer
CanadaCerebras Systems
3+ ansCandidates need 3+ years building high-performance or distributed systems software, strong C/C++ skills, and experience with multi-threading and memory management. A Bachelor's, Master's, or equivalent experience in Computer Science, Electrical Engineering, or a related field is required.
C, C++, PyTorch, Python
Full Stack LLM Engineer
Toronto, ONCerebras Systems
Candidates need a degree in computer science, engineering or a related field, plus experience with deep learning frameworks, C/C++ low-level optimization and compiler development such as LLVM or MLIR. Strong debugging and optimization skills, including work on NP-hard problems, are also expected.
PyTorch, TensorFlow, LLVM, MLIR, C++
Staff Software Engineer, Inference Platform
Toronto, ONCerebras Systems
8+ ansCandidates need 8+ years of software engineering experience, deep distributed systems and Kubernetes expertise, and strong Go or C++ skills. Experience with TLS/mTLS, high-QPS latency optimization, and observability and SLO-driven operations is also required.
Kubernetes, Go, C++
FPGA Engineer
Toronto, ONCerebras Systems
5+ ansCerebras Systems needs candidates with 5+ years of production FPGA experience (or a Master's/PhD plus 3 years), Verilog skill in a Git repository, and strong FPGA place-and-route, timing closure and debug skills. Knowledge of TCP, RoCE and Wireshark, plus network switch familiarity, is also required.
Verilog, Git, Wireshark, Arista, Juniper