Analog Engineer, Staff
Toronto, ONQualcomm Canada ULC
4+ ansCandidates need a bachelor's, master's or PhD in electrical engineering with analog or mixed-signal CMOS design experience and several years of ASIC design or verification work. Experience with circuit design tools, transistor-level design, layout optimization and silicon-proven analog blocks is required.
Cadence ADE, MATLAB, SPICE, Verilog-A, Verilog, VHDL
DSP Systems Engineer, Staff
Toronto, ONQualcomm Canada ULC
4+ ansCandidates need a Bachelor's in engineering or a related field with 4+ years of systems engineering experience, or a Master's with 3+ years, or a PhD with 2+ years. Strong MATLAB, Python and C/C++ skills, plus DSP architecture experience in mixed-signal SerDes, are required.
MATLAB, Python, C/C++, RTL simulation tools
System Engineer, Application Engineering Principal
Ottawa, ON +1Qualcomm Canada ULC
12+ ansCandidates need a master's or PhD in an engineering or science field and 6 to 12+ years of experience in high-speed communications, DSP or SerDes. Deep knowledge of PAM4 signaling, IEEE 802.3 standards and MATLAB or Python is required.
MATLAB, Python
Cross-Functional Engineer, Staff
Toronto, ON +1Qualcomm Canada ULC
4+ ansCandidates need a bachelor's, master's or PhD in Electrical Engineering with analog or mixed-signal chip design experience and several years of ASIC design or verification work. They also need strong high-speed SerDes knowledge, SystemVerilog and EDA tool skills.
Cadence, SPICE, MATLAB, Verilog, VHDL, SystemVerilog
Analog Engineer, Principal
Toronto, ONQualcomm Canada ULC
8+ ansCandidates need a Master's or PhD in electrical engineering (or a Bachelor's with 2+ years of analog or mixed-signal design), plus 8+ years of ASIC design or related work and silicon-proven analog circuit experience in advanced CMOS. Strong skills in Cadence, SPICE, MATLAB or Verilog-A are expected.
Cadence ADE, MATLAB, SPICE, Verilog-A