Design Verification Lead
Markham, ONAdvanced Micro Devices, Inc
Candidates need a Bachelor's or Master's degree in an electrical, computer or related engineering field, strong UVM and SystemVerilog skills, and experience verifying high-speed protocols such as PCIe, CXL or Ethernet. Technical leadership, mentoring and scripting in Python or Perl are preferred.
SystemVerilog, Verilog, UVM, Python, Perl
Senior ASIC RTL Design Engineer, AI Networking IP
Ottawa, ONAdvanced Micro Devices, Inc
Candidates need a Bachelor's or Master's in computer or electrical engineering, and strong Verilog or SystemVerilog RTL design skills. Experience delivering ASIC or FPGA products, plus networking or high-speed interface knowledge, is preferred.
Verilog, SystemVerilog, Synopsys tools, Cadence tools, Siemens (Mentor) tools, Python
3D IC and ADVANCED PACKAGING CAD ENGINEER
Markham, ONAdvanced Micro Devices, Inc
Candidates need a bachelor's or master's degree in computer or electrical engineering, experience with 3D-IC design and advanced packaging, and hands-on work with Synopsys 3DIC Compiler. Strong scripting skills and experience applying AI to CAD or hardware design are also needed.
Synopsys 3DIC Compiler, Synopsys EDA tools, Cadence EDA tools, Linux/Unix, Python, TCL
Physical Design Engineer
Vancouver, BCAdvanced Micro Devices, Inc
Candidates need a bachelor's or master's degree in computer or electrical engineering and hands-on ASIC physical design experience from RTL to GDSII. Strong Verilog, timing analysis, low-voltage design and advanced-node tape-out experience (3nm to 16nm) are preferred.
Synopsys tools, Cadence tools, Mentor Graphics tools, Verilog
Design Verification Engineer
Markham, ONAdvanced Micro Devices, Inc
Candidates need hands-on hardware verification experience across multiple projects or tapeouts, with SystemVerilog, UVM, Verilog and scripting skills. A Bachelor's or Master's in Computer or Electrical Engineering is expected.
UVM, Verilog, Makefiles, Perl, Python, Ruby
Verification Engineer
Markham, ONAdvanced Micro Devices, Inc
Candidates need strong SystemVerilog and UVM skills, solid ASIC/SoC verification experience, and familiarity with constrained-random, coverage-driven and formal (SVA) methods. A bachelor's or master's in computer or electrical engineering is required.
Synopsys VCS, Cadence IES, Cadence IEV, Jasper, VC-Formal, Magellan
Summer 2027 Long Term Hardware Design Verification Engineering Intern/Co-Op
Markham, ONAdvanced Micro Devices, Inc
Candidates need to be enrolled in a Canada-based university Bachelor's program in electrical engineering, computer science, computer engineering or a related field. Experience with C++, Python, Perl, UVM, Verilog or SystemVerilog, digital systems, and Linux or Windows debugging is an asset.
Verilog, UVM, Perl, Python, MySQL, PHP
Short Term 2027 Hardware Design Verification Engineering Intern/Co-Op
Vancouver, BCAdvanced Micro Devices, Inc
Candidates need to be enrolled in a Canadian university Bachelor's program in electrical engineering, computer science, computer engineering or a related field. Programming in C++, Python, Perl or Shell, and knowledge of Verilog, SystemVerilog and digital logic design, are strongly encouraged.
Verilog, UVM, Perl, Python, MySQL, PHP
Short Term 2027 Hardware Design Verification Engineering Intern/Co-Op
Markham, ONAdvanced Micro Devices, Inc
Candidates need current enrolment in a Canadian university Bachelor's program in electrical engineering, computer science, computer engineering or a related field. Programming in Python, Perl or C++, and familiarity with Verilog, SystemVerilog and digital logic design are strongly preferred.
Verilog, UVM, Perl, Python, MySQL, PHP
Silicon Design Verification Engineer
Markham, ONAdvanced Micro Devices, Inc
Candidates need a Bachelor's or Master's in Computer or Electrical Engineering, plus knowledge of digital logic and computer architecture. Experience with SystemVerilog, UVM, C++ and Python, and protocols such as PCIe or AXI, is preferred.
UVM, C++, Python, SVA formal tools
Physical Design Engineer
Markham, ONAdvanced Micro Devices, Inc
Candidates at Advanced Micro Devices need ASIC physical design experience from RTL to GDSII, strong Verilog and timing analysis skills, and hands-on tape-out experience on 3nm to 16nm SoCs. They also need experience with Synopsys, Cadence or Mentor Graphics CAD tools and a bachelor's or master's degree in electrical or computer engineering.
Synopsys tools, Cadence tools, Mentor Graphics tools, Verilog
Firmware Engineer
Vancouver, BCAdvanced Micro Devices, Inc
Candidates need a Bachelor's, Master's or PhD in Electrical or Computer Engineering, strong C, C++ and scripting skills, and firmware experience on pre- and post-silicon platforms. Experience with DDR/JEDEC IP, memory controllers or PHYs, and computer architecture is needed.
oscilloscope, logic analyzer, VCS, FPGA
RTL/Firmware Design Engineer
Markham, ONAdvanced Micro Devices, Inc
Candidates need a Bachelor's or Master's degree in computer engineering, electrical engineering, computer science or a related field. Preferred skills include embedded C/C++, Verilog or SystemVerilog, Python scripting, computer architecture and hands-on use of AI coding tools.
Verilog, SystemVerilog, Python, Perl, Git, Perforce
Silicon Design Engineer
Markham, ONAdvanced Micro Devices, Inc
Candidates need a bachelor's degree in electrical or computer engineering, with a master's or PhD preferred. Experience with ASIC hardware and firmware design and verification, C/C++ and SystemVerilog, and bus protocols like AXI and AHB is preferred.
UVM, C-DPI, Verilog, FPGA prototyping platforms, Python, Perl
SoC Lead Engineer – LEC & Low Power Signoff
Markham, ONAdvanced Micro Devices, Inc
Advanced Micro Devices needs candidates with proven SoC implementation and tapeout experience, deep knowledge of equivalence checking and low power verification, and hands-on use of industry EDA tools. Strong scripting, debugging, leadership and communication skills are also required, along with a BS or MS in Electrical Engineering, ECE, EEE or a related field.
Synopsys Formality, Cadence Conformal, Synopsys VC-LP, Cadence Conformal Low Power, Design Compiler, Fusion Compiler
STA/Constraints Engineer
Vancouver, BCAdvanced Micro Devices, Inc
Candidates need industry experience in static timing analysis, constraints and timing signoff, plus expert use of Synopsys PrimeTime and GCA. Scripting in Perl, TCL, Shell or Python, and a degree in microelectronics or a related field, are preferred.
GCA, ICC2, Verilog, Perl, TCL, Python