Emplois “tcl” au Canada – Page 8

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• 1 mois

  Software Engineer

  Toronto, ON

  90k–140k $/anTemps plein

  MS

  MCHP Semiconductor Canada ULC

  7+ ansCandidates need a degree in computer science or electrical or computer engineering, 7+ years of software experience, strong C/C++ skills and at least 2 years working with LLVM/MLIR. A solid grasp of digital design and algorithms is also required.

  LLVM, MLIR, Git, Python, TCL, Bash

  1 mois

  Senior SoC Design Engineer

  Burnaby, BC

  86k–186k $/anTemps plein

  MS

  MCHP Semiconductor Canada ULC

  3+ ansCandidates need a Bachelor's or Master's in electrical or computer engineering and 3 to 5 years of related experience, including RTL design in SystemVerilog and Verilog. Experience with ASIC design flows, synthesis, static timing analysis and PCI-Express is valued.

  Synopsys Design Compiler, Cadence Incisive, Verilog, Perl, Python, Tcl

  1 mois

  Senior Engineer - Analog Design

  Ottawa, ON

  Temps plein

  MS

  MCHP Semiconductor Canada ULC

  3+ ansCandidates need a Master's or PhD in Electrical Engineering and about 3 to 5 years of analog or mixed-signal IC design experience. They should know PLLs, ADCs, filters or high-speed I/O and use Cadence IC design tools.

  Cadence IC design tools, Verilog-A, Skill, Python, Perl, Tcl

  1 mois

  Senior Technical Staff Engineer - Analog Design

  Ottawa, ON

  Temps plein

  MS

  MCHP Semiconductor Canada ULC

  10+ ansCandidates need a Master's or Doctorate in Electrical Engineering or a related field and 10+ years of analog and mixed-signal IC design experience, including PLLs, DLLs, ADCs, DACs and high-speed I/O. Strong skills in Cadence tools, scripting and multi-site teamwork are required.

  Cadence, Verilog-A, Skill, Python, Perl, Tcl

  1 mois

  Ingénieur principal du personnel technique – Conception analogique/ Senior Technical Staff Engineer - Analog Design

  Montréal, QC

  Temps plein

  MS

  MCHP Semiconductor Canada ULC

  10+ ansMaîtrise ou doctorat en génie électrique; Plus de 10 ans d’expérience en circuits intégrés analogiques et mixtes; Expérience en PLL/DLL, ADC/DAC et interfaces E/S haute vitesse

  Cadence IC, Verilog-A, Skill, Python, Perl, Tcl

• 1 mois

  Principal Engineer - Analog Design

  Toronto, ON +1

  107k–157k $/anTemps plein

  MC

  Microchip - Canada

  5+ ansCandidates need a Master's or PhD in electrical engineering and at least 5 years of analog and mixed-signal circuit experience. Microchip Technology prefers experience with ADCs, DACs, filters, PLLs, DLLs and high-speed I/Os, plus scripting in SKILL, Python, Perl or Tcl.

  Cadence, Verilog-A, SKILL, Python, Perl, Tcl

  1 mois

  Ingénieur principal en analogique/ Principal Engineer - Analog Design

  Montréal, QC

  Temps plein

  MC

  Microchip - Canada

  5+ ansCandidates need a master's or PhD in electrical engineering and at least 5 years of analog and mixed-signal design experience. Strong skills in high-speed circuits, Cadence IC tools, scripting and Verilog-A are expected.

  Cadence IC, Verilog-A, Skill, Python, Perl, Tcl

• 1 mois

  Senior Engineer I - Validation (ASIC)

  Burnaby, BC

  86k–186k $/anTemps plein

  

  Microchip - USA

  5+ ansCandidates need a bachelor's or master's degree in computer science, computer engineering or electrical engineering, and at least five years of experience. They must know Tcl, Python and C, understand digital systems and computer architecture, and communicate clearly in writing and speech.

  protocol analyzer, JTAG, NVMe, PCIe

• 1 mois

  Staff Physical Design Engineer

  Télétravail au Canada

  Télétravail

  

  EnCharge AI

  10+ ansCandidates need a Bachelor's or Master's in electrical, computer or a related engineering field and 10 to 15 years of physical design experience. Strong Cadence, static timing analysis, low-power and EM/IR skills, plus Tcl or Python scripting, are required.

  Cadence design tools, Tcl, Python

• 1 mois

  Digital - ASIC Design Automation & Integration Engineer

  Canada

  Sur placeTemps plein

  E

  Eliyan

  5+ ansEliyan needs candidates with a relevant engineering degree and five or more years in ASIC or SoC design or design automation. Candidates must know lint, CDC and synthesis tools, SystemVerilog, Python, Tcl, Git, Linux and CI/CD pipelines, and be authorized to work in the United States or Canada.

  SpyGlass, QuestaLint, Genus, Fusion Compiler, Jenkins, Git

• 1 mois

  Principal High-Speed Analog Layout Design Engineer

  Ottawa, ON

  CC

  Celero Communications, Inc.

  10+ ansCandidates need 10+ years of hands-on analog and mixed-signal layout experience, including advanced FinFET nodes and a record of owning major IP layout macros. They must know verification tools such as Calibre and Pegasus, device physics and layout-dependent effects, and be able to work with international and remote teams.

  Cadence Virtuoso, Calibre, Pegasus, SKILL, TCL, Python

• 1 mois

  Physical Design Methodology Engineer, AI HW IP

  Toronto, ON

  

  Tenstorrent: Tenstorrent is a next-generation computing company that builds computers for AI.

  5+ ansCandidates need 5+ years developing or supporting physical design methodology or CAD flows in production. They need expertise with industry EDA tools, scripting in Tcl, Python or Perl, and knowledge of advanced node methodology, low-power design and signoff.

  FusionCompiler, ICC2, Innovus, Genus, PrimeTime, RedHawk

  1 mois

  Physical Design Engineer, AI Accelerator IP

  Toronto, ON

  

  Tenstorrent: Tenstorrent is a next-generation computing company that builds computers for AI.

  5+ ansCandidates need a BS, MS or PhD in electrical, computer or computer science engineering, plus 5+ years of block-level or IP physical design through tapeout. Strong knowledge of advanced-node low-power design and signoff, and proficiency with Innovus, ICC2 or FusionCompiler, PrimeTime and scripting, are required.

  Innovus, ICC2, FusionCompiler, PrimeTime

• 1 mois

  Hardware Intern - AI HW & SoC (Canada)

  Ottawa, ON +1

  

  Tenstorrent University Jobs: Tenstorrent is a next-generation computing company that builds computers for AI.

  Candidates need to be students in EE, ECE, CE or CS with coursework in digital design and computer architecture. They should know ASIC concepts such as RTL, verification, logic synthesis and timing analysis, and have scripting or programming skills.

  Python, C++, PERL, tcl, architectural simulator

• 1 mois

  Sr. Staff Physical Design Timing Engineer (STA)

  Toronto, ON

  

  Lightmatter

  12+ ansLightmatter needs candidates with a bachelor's degree in electrical or computer engineering and 12 years of physical design experience, including 5 years of hands-on ASIC timing work. They must be skilled in Cadence or Synopsys timing tools and scripting in TCL and Python, Perl, or Shell.

  Synopsys PrimeTime, Cadence Tempus

  1 mois

  Sr. Staff Physical Design Engineer

  Toronto, ON

  

  Lightmatter

  12+ ansCandidates need a bachelor's in electrical or computer engineering and 12+ years of physical design experience, including taped-out large ASIC or mixed-signal chips. Strong scripting skills in TCL and Python and teamwork across functional groups are also required.

  Cadence, TCL, Python, Shell, DRC, LVS

• 1 mois

  Senior ASIC (Front End) Design Engineer

  Toronto, ON

  Hybride

  

  Ethernovia, Inc.

  10+ ansCandidates need a BS or MS in electrical engineering, computer science or a related field and 10+ years of ASIC RTL design or architecture experience. They must have built complex SoCs, know Verilog/SystemVerilog and simulation tools, and work well both independently and in teams.

  Verilog, Perl, TCL, C/C++, Make

  1 mois

  Senior ASIC Design Verification Engineer

  Télétravail au Canada

  Télétravail

  

  Ethernovia, Inc.

  10+ ansCandidates need a BS or MS in electrical engineering, computer science or a related field, and at least 10 years of ASIC verification experience. Required skills include SystemVerilog, UVM, Python, TCL and C/C++, plus strong debugging and communication abilities.

  Verilog, UVM, Python, TCL, C/C++, SystemC

10 entreprises