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Actalent: Actalent is an operating company of Allegis Group, the global leader in talent solutions.
5+ ansCandidates need 5+ years of ASIC/FPGA design experience, strong SystemVerilog skills, hands-on Cadence simulation experience, and practical debug and timing analysis skills. VHDL, Xilinx Vivado, Python, C/C++, DSP and high-speed interface experience are assets.
SystemVerilog, Xilinx, Vivado, Cadence simulation tools, Python, C
MDA
15+ ansCandidates need a bachelor's degree in electrical engineering or equivalent and 15+ years designing or architecting FPGAs or ASICs, including technical leadership of an FPGA team. Strong French and ideally English communication, teamwork, and a reliability security clearance are required.
Synplify, ModelSim, Xilinx Vivado, Microchip Libero, Jira, Confluence
MDA
5+ ansCandidates need a bachelor's degree in electrical engineering or equivalent and five years of FPGA or ASIC design experience. They need VHDL skills, tool knowledge (Synplify, Questa, Vivado, Libero), Linux scripting, and bilingual English and French communication.
Synplify, Modelsim, Questa, Vivado, Libero, Jira
Go RH
5+ ansCandidates need a bachelor's degree in electrical or computer engineering, 5+ years of relevant experience, and FPGA design experience. They must know VHDL, Verilog or SystemVerilog, FPGA tools such as Vivado or Quartus, and digital communication protocols, and speak French and English.
Xilinx Vivado, Intel Quartus, Altium Designer
Kardium Inc.
5+ ans1+ gestionCandidates need a bachelor's degree or higher in electrical or computer engineering, at least 5 years of hands-on FPGA design and verification, and 1-2 years leading or mentoring engineers. Strong VHDL skills and experience with Xilinx/AMD tools are required, and medical device quality standards are an asset.
Vivado, Vitis, Altium Designer, ModelSim, Questa, Active-HDL
Kardium Inc.
5+ ansCandidates need a bachelor's degree or higher in an engineering field and at least 5 years of FPGA development and verification experience. Strong VHDL, Vivado and Active-HDL skills, plus excellent communication, are required.
Vivado, Active-HDL, Logic analyzer, Oscilloscope, Git
Kepler Communications
5+ ansCandidates need a bachelor's degree in computer or electrical engineering, 5+ years of FPGA/RTL design experience, and skill in Verilog, SystemVerilog or VHDL. They also need Xilinx Zynq or UltraScale experience, timing and clock domain crossing knowledge, and scripting skills.
Vivado, Quartus, ModelSim, Python, Tcl
Kepler Communications
5+ ansCandidates need a bachelor's degree in computer or electrical engineering and 5+ years of FPGA/RTL design experience. They must know Verilog, SystemVerilog or VHDL, Xilinx Zynq and UltraScale devices, clock domain crossing and timing closure, and scripting in Python or Tcl.
Vivado, Quartus, ModelSim, Questa Sim, Riviera-Pro, Python
Fidus Systems: Founded in 2001, Fidus Systems is a premier electronic system design and development company with specialized expertise in FPGA design, embedded…
5+ ansCandidates need at least 5 years of FPGA design experience using RTL, Verilog or VHDL, with knowledge of video, communications and DSP systems. Fidus Systems also requires Xilinx or Altera tool experience, a degree in engineering, strong English communication skills, and the ability to pass Canadian controlled-goods security screening.
Xilinx Vivado, Altera Quartus, ModelSim, Verilog, VHDL, SystemVerilog
Fidus Systems: Founded in 2001, Fidus Systems is a premier electronic system design and development company with specialized expertise in FPGA design, embedded…
5+ ansCandidates need at least 5 years of FPGA design experience using RTL, Verilog or VHDL, with knowledge of video, communications and DSP systems. Fidus Systems also requires Xilinx or Altera tool experience, a degree in engineering, strong English communication skills, and the ability to pass Canadian controlled-goods security screening.
Xilinx Vivado, Altera Quartus, ModelSim, Verilog, VHDL, SystemVerilog
Fidus Systems: Founded in 2001, Fidus Systems is a premier electronic system design and development company with specialized expertise in FPGA design, embedded…
5+ ansCandidates need at least 5 years of FPGA design experience using RTL, Verilog or VHDL, with knowledge of video, communications and DSP systems. Fidus Systems also requires Xilinx or Altera tool experience, a degree in engineering, strong English communication skills, and the ability to pass Canadian controlled-goods security screening.
Xilinx Vivado, Altera Quartus, ModelSim, Verilog, VHDL, SystemVerilog
Fidus Systems: Founded in 2001, Fidus Systems is a premier electronic system design and development company with specialized expertise in FPGA design, embedded…
5+ ansCandidates need at least 5 years of FPGA design experience using RTL, Verilog or VHDL, with knowledge of video, communications and DSP systems. Fidus Systems also requires Xilinx or Altera tool experience, a degree in engineering, strong English communication skills, and the ability to pass Canadian controlled-goods security screening.
Xilinx Vivado, Altera Quartus, ModelSim, Verilog, VHDL, SystemVerilog
Myticas Consulting
7+ ansCandidates need proven FPGA and RTL design experience, expertise in NR, LTE, eCPRI, CPRI and PTP protocols, and knowledge of the O-RAN ecosystem. Experience with UVM, Git and tools like Quartus, Vivado and MATLAB/Simulink is also required.
Quartus, Vivado, MATLAB/Simulink, HDL Coder, Git, GitHub
Clarius Mobile Health
3+ ansCandidates need a bachelor's or master's degree in electrical/computer engineering or computer science and 3-5 years of embedded firmware experience across MCU, MPU and FPGA/VHDL. Clarius Mobile Health also wants Xilinx, Vivado, embedded Linux on Ubuntu, MPSoC Ultrascale+ and STM32 experience, plus strong C/C++ and English communication skills.
Vivado, Xilinx FPGA, Ubuntu, STM32, oscilloscope, logic analyzer
Celestica International LP
5+ ansCandidates need a bachelor's degree in computer science, software or electrical engineering, or a related field, and 5+ years of enterprise IT or application engineering experience, including 2+ years supporting an R&D engineering team. Hands-on experience with EDA/CAD suites, DevOps tools, license management and Linux and Windows environments is required.
Azure DevOps, Jira, Git, Docker, Kubernetes, PTC Creo
LMI Technologies
5+ ansCandidates need a bachelor's degree in electrical engineering and at least five years designing and testing digital logic such as FPGAs or ASICs. Hands-on experience with VHDL or Verilog, high-speed interfaces and self-verifying simulation environments is required.
Vivado, Chipscope, Logic analyzers, Oscilloscopes, Xilinx IP, Intel FPGA
Q-Block Computing: Imagine instruments precise enough to probe this reality—to ask whether the cosmos operates according to Nature’s own algorithms.
4+ ansCandidates need a related engineering degree, 4+ years of professional FPGA design and verification experience, and hands-on work with Vivado, Quartus or Lattice toolchains. They also need strong high-speed digital design skills and proficiency with oscilloscopes, logic analyzers and signal generators.
Xilinx Vivado, Intel Quartus, Lattice toolchain, oscilloscope, logic analyzer, signal generator
General Dynamics Missions System International
Candidates need a bachelor's degree in electrical or computer engineering (recent graduates welcome), hands-on FPGA project experience, and basic VHDL or Verilog skills. They must be eligible to work in Canada and able to obtain a Canadian government security clearance.
Xilinx Vivado, Git, oscilloscope, logic analyser, FPGA prototyping board
18 entreprises