Senior PCIe Design Engineer
Toronto, ONA
ARM
5+ ansArm needs candidates with a Bachelor's or Master's degree in a related engineering or computer science field and 5+ years of SoC or compute subsystem design experience. Candidates need Verilog, PCIe, CXL or Ethernet integration experience and scripting skills in Perl or Python.
Verilog HDL, Perl, Python
Staff PCIe Design Engineer
Toronto, ONA
ARM
10+ ansCandidates need a Bachelor's or Master's degree in computer science or electrical or computer engineering, 10+ years designing complex SoCs or compute subsystems, and strong Verilog and digital design skills. Experience with PCIe, CXL, UCIe or Ethernet subsystems and static design checks is required.
Verilog HDL, Perl, Python