Physical Design Engineer
Vancouver, BCAMD, Inc.
Candidates need hands-on ASIC physical design experience from RTL to GDSII, strong Verilog and timing analysis skills, and tape-out experience on advanced nodes such as 3nm, 5nm, 7nm or 16nm. A bachelor's or master's degree in computer or electrical engineering is required.
Synopsys, Cadence, Mentor Graphics, Verilog
Physical Design Engineer
Markham, ONAMD, Inc.
Candidates need a bachelor's degree in an electrical, electronics or computer engineering discipline and deep experience in ASIC physical design implementation and signoff. They also need hands-on skill with industry EDA tools and power, performance and area optimization.
Synopsys ICC2, Cadence Innovus, PrimeTime, Spyglass, RedHawk, Calibre
Physical Design Engineer
Markham, ONAMD, Inc.
Candidates need hands-on ASIC physical design experience from RTL to GDSII, strong Verilog and timing analysis skills, and tape-out experience on advanced nodes such as 3nm, 5nm, 7nm or 16nm. A bachelor's or master's degree in computer or electrical engineering is required.
Synopsys, Cadence, Mentor Graphics, Verilog
Principal ASIC Design Engineer
Markham, ONAMD, Inc.
Candidates need a track record of leading ASIC or silicon designs through multiple product tape-outs, plus deep RTL and microarchitecture experience. Strong communication skills and the ability to lead technical reviews are also required.
Verilog, SystemVerilog, Python, Perl, Tcl
Design Verification Lead
Markham, ONAMD, Inc.
Candidates need a bachelor's or master's degree in electrical or computer engineering, computer science or a related field, plus UVM and SystemVerilog experience and knowledge of high-speed protocols such as PCIe, CXL or Ethernet. Scripting in Python or Perl and technical leadership skills are also needed.
SystemVerilog, Verilog, UVM, Python, Perl