FY27 Intern - Camera Design Implementation Intern - Canada (16 months)
Vancouver, BCQualcomm Canada ULC
Candidates need to be enrolled in a bachelor's degree in engineering, computer science or a related field, with an expected graduation of November 2028 or later. Strong scripting skills and knowledge of ASIC design flow are needed.
synthesis tools, static timing analysis tools, formal verification tools
SOC Design Engineer
Markham, ON +2Qualcomm Canada ULC
4+ ansCandidates need a degree in science or engineering and 4+ years of ASIC design, verification or integration work, with strong digital front-end design skills in Verilog, SystemVerilog and VHDL. Experience with power domains, clock domain crossing, low-power design and chip design tools is needed.
Spyglass, Design Compiler, Cadence LEC, Perl, TCL
Camera Design Engineer
Vancouver, BCQualcomm Canada ULC
3+ ansCandidates need a bachelor's, master's or PhD in a computer, electrical or related engineering field, with 4 to 2 years of hardware or related experience depending on degree. Verilog or VHDL RTL design, design verification and bus protocol experience are key.
Verilog, VHDL, TCL, Perl, Python
FY27 Intern - Camera Systems Internship - Canada (16 months)
Vancouver, BCQualcomm Canada ULC
Candidates need to be enrolled toward a bachelor's or master's in engineering, computer science or a related field, and be available for a 16-month internship. Experience with microcontrollers, RTOS or ARM architectures, plus Android debugging and version control, is preferred.
JTAG, ADB, Android development environments, Version-control systems
Camera Frontend Implementation Engineer
Vancouver, BCQualcomm Canada ULC
Candidates need a Bachelor's degree in science, engineering, or a related field, plus hands-on experience with large-block chip synthesis and timing closure. Strong scripting skills and the ability to lead design reviews and collaborate across teams are required.
RTL, DFT, Leadership, Recruitment