ASIC Digital Verification, Sr. Manager
Mississauga, ONS
Synopsys
15+ ansCandidates need a BS or MS in EE, EC or VLSI with 15+ years of IP or SoC verification experience, and strong team leadership. They must know Verilog, SystemVerilog and UVM, and Perl or Python automation. PCIe and Ethernet knowledge is an asset.
Verilog, SystemVerilog, UVM, Perl, Python