Principal DSP Firmware Engineer
Ottawa, ONMCHP Semiconductor Canada ULC
6+ ansCandidates need an MSc or PhD in electrical or computer engineering or a related field, plus at least 6 years of DSP or embedded software experience. Strong C/C++, Python, TCL and RTOS skills are required, along with good debugging and communication skills.
C/C++, Python, TCL, Jira, Git, Confluence
Ingénieur Principal – Analogique/Mixte (Responsable Technique IP) / Principal Engineer - Analog/Mixed-Signal (IP Technical Lead)
Montréal, QC +1MCHP Semiconductor Canada ULC
10+ ansCandidates need a bachelor's in electrical engineering with at least 10 years of mixed-signal CMOS design experience, or a master's with 7.5 years. Experience with high-speed SERDES or PLL circuits and circuit simulators such as HSPICE and Spectre is required, and fluent English is mandatory.
HSPICE, Spectre
Senior Field Applications Engineer (FAE)
OntarioMCHP Semiconductor Canada ULC
7+ ansCandidates need a degree in electrical or computer engineering, 7+ years of embedded, hardware, firmware or semiconductor design experience, and strong knowledge of high-speed interfaces such as Ethernet and PCIe. Fluent English and French and willingness to travel to customer sites are required.
Sales, Embedded systems, Customer relations, Leadership, Presentation skills, Firmware
Manager- Validation Design Engineering
Burnaby, BCMCHP Semiconductor Canada ULC
12+ ansCandidates need a Bachelor's or Master's in electrical or computer engineering, 12+ years of related experience including leading engineering teams, and coaching and developing engineers. Hands-on knowledge of high-speed interfaces such as PCI Express and Ethernet, FPGA and test automation, and lab instruments is preferred.
oscilloscopes, BERT, VNA, protocol analyzers, FPGA platforms, 1.6T Ethernet testers
Senior Manager-Design Engineering
Burnaby, BC +2MCHP Semiconductor Canada ULC
12+ ansCandidates need a Bachelor's or Master's in electrical or computer engineering, 12+ years of related experience and proven experience leading engineering teams. Strong coaching skills, debugging ability and Verilog or VHDL design experience are required; SOC, communication protocols, Synopsys or Cadence tools and 28nm process experience are assets.
Verilog, VHDL, Synopsys, Cadence