FrontEnd CMA (CAD) Engineer
Toronto, ONARM
Candidates need experience in ASIC/SoC build or front-end CAD, strong Python and Tcl skills, and knowledge of RTL, Verilog/SystemVerilog and verification methods such as Lint, CDC and formal. They also need experience building production CAD flows, a degree in electrical or computer engineering or computer science (or equivalent experience), and an AI-first approach to automation.
Python, Tcl, Shell, Linux, Verilog, SystemVerilog
Staff PCIe Verification Engineer
Toronto, ONARM
7+ ansArm needs candidates with a Bachelor's or Master's degree in computer science or electrical or computer engineering and 7+ years of PCIe or CXL verification experience. They must have strong Verilog and UVM skills, simulation and emulation experience, and knowledge of formal methods.
SystemVerilog, Verilog, UVM, PCIe IP, CXL IP, Emulation platforms
Senior PCIe Verification Engineer
Toronto, ONARM
4+ ansCandidates need a Bachelor's or Master's degree in a related engineering or computer science field and 4+ years of PCIe or CXL verification experience. Strong skills in Verilog, UVM, debugging and simulation or emulation platforms are required.
SystemVerilog, Verilog, UVM, Debuggers, Simulation platforms, Emulation platforms