Emplois “EDA” au Canada – Page 4

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• 26j

  Staff Physical Design Engineer

  Toronto, ON

  T

  Talentlab

  5+ ansCandidates need 5+ years of physical design experience on digital ASICs, including advanced nodes like TSMC N5, N4P or N3. They must know industry EDA tools, PnR, timing analysis and physical verification, and be strong in TCL, Python or Perl.

  Synopsys ICC2, Cadence Innovus, Calibre, PrimeTime, RedHawk, TCL

  26j

  Analog IC Design Engineer

  Toronto, ON

  T

  Talentlab

  5+ ansCandidates need an MSc or PhD in electrical engineering or a related field and 5+ years of analog IC design experience, preferably silicon-proven. They need hands-on advanced CMOS experience, SPICE and Verilog-A simulation skills, and EDA tool proficiency.

  SPICE, Verilog-A, EDA tools

• 26j

  Bilingual Senior Workforce Manager Support Consultant / Consultant(e) principal(e) en soutien à la gestion des effectifs bilingue

  Etobicoke, ON +3

  A

  ADP

  3+ ans3 ans d'expérience minimum avec les produits ADP Time and Attendance; Gestion exceptionnelle des demandes de service et sens du service à la clientèle; Excellentes communications écrites et orales en français et en angla

  ADP Workforce Manager, Enhanced Time, Excel, SQL, Excel VBA, Boomi

• 26j

  DFT & Post-Silicon Validation

  Gatineau, QC

  HybrideTemps plein

  

  TechBiz Global GmbH

  Candidates need a degree in computer science, electrical engineering or a related field and proven experience taping out high-performance SoCs or SiPs for mass production. They also need strong post-silicon test and yield analysis skills, and RTL and testbench coding in SystemVerilog and Verilog.

  Tessent, SystemVerilog, Verilog, Tcl, Python3, Shell

• 27j

  Software Development Co-op Student (Winter 2027)

  Ottawa, ON

  21–25 $/hStage

  T

  TechInsights

  Candidates need to be enrolled in post-secondary study in Computer Science, Data Science or a related field, with hands-on software development experience. Strong communication, analytical skills and experience in an Agile environment are also needed.

  Angular, React, Infrastructure as Code, EDA tools

• 27j

  3D IC and ADVANCED PACKAGING CAD ENGINEER

  Markham, ON

  Temps plein

  AI

  AMD, Inc.

  Candidates need a computer or electrical engineering degree, experience in 3D-IC and advanced packaging, and hands-on work with Synopsys or Cadence EDA tools. Strong Python, TCL and Perl scripting on Linux, plus experience applying AI or LLMs to CAD or hardware design, are preferred.

  Synopsys 3DIC Compiler, Synopsys EDA tools, Cadence EDA tools, Verilog, UPF, Python

  27j

  Printed Circuit Board PCB Design and Layout Engineer

  Markham, ON

  Temps plein

  AI

  AMD, Inc.

  Candidates need extensive experience designing complex printed circuit boards in tools such as Cadence Allegro, Altium or Zuken, plus a Bachelor's or Master's degree in electrical or computer engineering. Strong high-speed routing and fabrication knowledge is preferred.

  Cadence Allegro, OrCAD, Altium, Zuken, PADS, ODB++

  27j

  Lead Physical Design Engineer, Place & Route

  Markham, ON

  Temps plein

  AI

  AMD, Inc.

  Candidates need deep place-and-route and physical design experience on complex, advanced-node chips, plus scripting skills in TCL, Perl or Shell. A bachelor's or master's degree in electrical, computer or a related engineering field is preferred.

  Synopsys Fusion Compiler, Cadence, Siemens EDA, TCL, Perl, Shell

  27j

  SoC Lead Engineer – LEC & Low Power Signoff

  Markham, ON

  Temps plein

  AI

  AMD, Inc.

  Candidates need proven SoC implementation and tapeout experience, in-depth LEC and low power static verification skills, and hands-on use of Formality or Conformal, VC-LP or CLP, and Design Compiler or Fusion Compiler. Verilog, VHDL, UPF, Tcl, Perl and Python skills and a BS/MS in electrical engineering or a related field are also expected.

  Synopsys Formality, Cadence Conformal, Synopsys VC-LP, Cadence Conformal Low Power, Design Compiler, Fusion Compiler

  27j

  Cores Verification Lead

  Ontario

  Temps plein

  AI

  AMD, Inc.

  Candidates need deep expertise in build systems and large-scale development environments, plus experience with distributed build infrastructure and compute farm scheduling such as LSF. A BS or MS in CS or EE is desired, with some industry experience.

  LSF

  27j

  STA/Constraints Engineer

  Vancouver, BC

  Temps plein

  AI

  AMD, Inc.

  Candidates need industry experience in STA, constraints and timing signoff, and expert use of Synopsys PrimeTime and GCA (ICC2 or Fusion Compiler desired). Scripting in Perl, TCL, Shell or Python and Verilog RTL experience are valued.

  ICC2, Verilog

• 27j

  IC design Implementation and SignOff Architect, (STA SignOff)

  Canada

  Temps plein

  C

  Cadence

  15+ ansCandidates need 15+ years of IC design implementation and signoff experience, deep advanced-node STA and ECO skills, and strong scripting in Tcl, Python or Perl. A BS or MS in electrical or computer engineering is required.

  Tempus, Certus, QRC

• 27j

  Physical Design Engineer Intern (Toronto)

  Toronto, ON

  AL

  Astera Labs Early Career - North America 2027

  Candidates need to be pursuing a bachelor's or master's degree in electrical, computer or a related engineering field. Coursework or hands-on experience with VLSI, digital logic and timing concepts, plus Unix/Linux and a scripting language such as Tcl or Python, is needed.

  Innovus, PrimeTime, Genus, Calibre, Voltus, Tcl

  27j

  DFT Engineering Intern

  Toronto, ON

  35–55 $/h

  AL

  Astera Labs Early Career - North America 2027

  Candidates need coursework or hands-on experience in electrical or computer engineering or a related field, and an understanding of digital logic and RTL. Programming in Verilog, SystemVerilog, Python, Tcl, Perl, C or C++ is needed, plus comfort in a Linux environment.

  Verilog, SystemVerilog, Python, Tcl, Perl, Linux

• 29j

  Principal Software Engineer

  Toronto, ON

  

  Questrade Financial Group: Questrade offers Canadians an easy way to invest in securities and foreign currency and provides online wealth management and mortgage through the…

  10+ ansCandidates need 10+ years of professional software engineering experience, including leading technical initiatives and solution design. They must use AI coding tools daily, have strong TypeScript skills, and know Domain-Driven Design and Event-Driven Architecture.

  Cursor, Claude, TypeScript, React, React Native, Google Cloud Platform

• 29j

  ASIC Design Engineer, Senior

  Télétravail au Canada

  TélétravailTemps plein

  

  Positron AI

  8+ ansCandidates need a BS or MS in electrical or computer engineering with 8+ years of ASIC or SoC RTL design experience. They need deep SystemVerilog skills, front-end EDA tool expertise, and hands-on work with at least three of HBM/DDR, PCIe/CXL, AMBA AXI/ACE/CHI, cache hierarchies, or high-throughput datapaths.

  SystemVerilog, Python, Tcl, Make, UVM, cocotb

  29j

  Physical Design Engineer - Synth, Senior

  Télétravail au Canada

  TélétravailTemps plein

  

  Positron AI

  8+ ansCandidates need 8+ years of ASIC implementation experience, including at least two tapeouts, and strong synthesis and timing-closure experience on large designs. Expertise with Genus or Design Compiler, SDC constraints, Tcl and Python scripting, and advanced process nodes (7nm and below preferred) is required.

  Cadence Genus, Synopsys Design Compiler, Tcl, Python

• 1 mois

  Staff / Principal AI Developer

  Télétravail au Canada

  TélétravailTemps plein

  

  cadstrom.io

  6+ ansCandidates need 6+ years building AI/ML systems with multiple production launches they led, deep practical LLM experience including prompt engineering, RAG and eval design, and TypeScript proficiency. Cadstrom.io also expects strong architectural judgment, mentorship ability, and clear communication with engineers and executives.

  TypeScript, MCP, LangSmith, LangGraph, DSPy, AWS

• 1 mois

  ASIC Physical Design, Sr Staff Engineer - 16724

  Nepean, ON

  S

  Synopsys

  9+ ansCandidates need 9+ years of ASIC physical design experience on complex SoC or test chip projects at advanced nodes. They must know the full physical design flow and tools such as Design Compiler, PrimeTime, IC Compiler II, Calibre and RedHawk, and must be authorized to work in the USA.

  Design Compiler, PrimeTime, IC Compiler II, ICV, Calibre, RedHawk

  1 mois

  Staff Applications Engineer (Electronics Thermal Management)

  Canada

  S

  Synopsys

  4+ ansCandidates need a master's in mechanical engineering with 6+ years in engineering software, or a bachelor's with 8+ years, or a PhD with 3+ years. They also need 4+ years of customer-facing application engineering, strong CFD and thermodynamics skills, and hands-on Ansys experience.

  Ansys Fluent, Ansys Icepak, Ansys Mechanical

  1 mois

  Analog Design, Principal Engineer- 18339

  Markham, ON

  S

  Synopsys

  8+ ansCandidates need 8+ years of CMOS analog or mixed-signal design experience and strong expertise in transistor-level and SerDes circuits. Hands-on FinFET layout, SPICE and scripting skills, and knowledge of reliability and ESD design are also required.

  SPICE simulators, EDA tools, Python, TCL

  1 mois

  Principal Physical Design Methodology Engineer

  Markham, ON

  S

  Synopsys

  10+ ansCandidates need a Bachelor's or Master's in Electrical or Computer Engineering and 10+ years of ASIC digital implementation experience. Deep expertise with Fusion Compiler or ICC2, high-speed IP experience, and Tcl and Python scripting are required.

  Fusion Compiler, ICC2, Innovus, PrimeTime, PrimePower, Tcl

  1 mois

  Principal SerDes Architect

  Mississauga, ON

  S

  Synopsys

  10+ ansCandidates need 10+ years in high-speed analog, SerDes or optical communications, with knowledge of IEEE 802.3, OIF and PCIe optical specifications. A BS or MS in Electrical Engineering, Physics or a related field is required, and a PhD is preferred.

  ICT system integration, Troubleshooting, Regulatory compliance, Optical components, Photonics, Documentation

  1 mois

  Product Management , Staff

  Vancouver, BC

  S

  Synopsys

  5+ ansCandidates need a technical degree or equivalent experience and at least five years of product management in photonics, optics or simulation software. They should understand photonic design workflows and simulation methods such as FDTD, and have experience with tools like OptoCompiler or Lumerical.

  OptoCompiler, Lumerical

11 entreprises