DSP Application Engineer, Principal
Ottawa, ONQualcomm Canada ULC
12+ ansCandidates need an electrical engineering degree and years of hardware applications or semiconductor experience, with deep knowledge of PAM4 signaling, DSP equalization, SerDes, Ethernet and optical communications. Hands-on skill with oscilloscopes, BERTs and VNAs, plus Python or C automation, is required.
Oscilloscope, BERT, VNA, Python, C
FY27 Intern - Softip Engineering Co-Op - Canada (4 months)
Ottawa, ONQualcomm Canada ULC
1+ ansCandidates need to be enrolled in a bachelor's or master's program in electrical, computer or related engineering, with scripting experience in Python, Perl, TCL or Unix/Linux shell and experience with source code revision systems.
Verilog, SystemVerilog, UVM, VHDL, SVN, CVS
System Engineer, Application Engineering Principal
Ottawa, ON +1Qualcomm Canada ULC
12+ ansCandidates need a master's or PhD in an engineering or science field and 6 to 12+ years of experience in high-speed communications, DSP or SerDes. Deep knowledge of PAM4 signaling, IEEE 802.3 standards and MATLAB or Python is required.
MATLAB, Python
Cross-Functional Engineer, Staff
Toronto, ON +1Qualcomm Canada ULC
4+ ansCandidates need a bachelor's, master's or PhD in Electrical Engineering with analog or mixed-signal chip design experience and several years of ASIC design or verification work. They also need strong high-speed SerDes knowledge, SystemVerilog and EDA tool skills.
Cadence, SPICE, MATLAB, Verilog, VHDL, SystemVerilog
Verification Engineer (Engineer–Senior Level)
Toronto, ONQualcomm Canada ULC
2+ ansCandidates need a bachelor's degree in science or engineering with 2+ years of ASIC design or verification experience, or a master's with 1+ year, or a PhD. Strong SystemVerilog and UVM skills, constrained random verification experience and clear communication are required.
SystemVerilog, UVM, Python, Perl, C/C++, GNU Make
FY27 Intern - Firmware/Embedded Software Engineering Internship - Canada (12 or 16 months)
Toronto, ONQualcomm Canada ULC
1+ ansCandidates need to be enrolled in a bachelor's degree in electrical or computer engineering, engineering science or computer science, with at least one year of academic programming experience in C, C++ or Python. Strong debugging, problem-solving and teamwork skills are needed, and availability must match the 12- or 16-month internship dates.
Git, Linux, FPGA, Verilog, SystemVerilog, GitHub Actions