Emplois “UVM” au Canada – Page 4

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• 1 mois

  SoC Design Lead, Microarchitecture and Design Methodology

  Markham, ON

  Temps plein

  AM

  Advanced Micro Devices, Inc

  Candidates need a strong foundation in computer architecture and digital design, with knowledge of static timing analysis, clocks and power optimization. Verilog or SystemVerilog experience, with UVM preferred, and strong communication and teamwork skills are needed.

  Verilog, SystemVerilog, UVM

  1 mois

  Silicon Design Engineer

  Markham, ON

  Temps plein

  AM

  Advanced Micro Devices, Inc

  Candidates need a bachelor's degree in electrical or computer engineering, with a master's or PhD preferred. Experience with ASIC hardware and firmware design and verification, C/C++ and SystemVerilog, and bus protocols like AXI and AHB is preferred.

  UVM, C-DPI, Verilog, FPGA prototyping platforms, Python, Perl

• 1 mois

  Digital Design Verification Engineer, Staff

  Toronto, ON

  Sur place

  

  Qualcomm Canada ULC

  4+ ansCandidates need a bachelor's degree in a science or engineering field with 4+ years of ASIC design or verification experience, or an equivalent master's or PhD with less experience. Strong SystemVerilog, UVM and scripting skills and proven leadership and communication are required.

  Verilog, SystemVerilog, UVM, Python, Perl, C/C++

  1 mois

  Design Verification Engineer — Memory Subsystem (Vancouver)

  Vancouver, BC

  Sur place

  

  Qualcomm Canada ULC

  3+ ansCandidates need a bachelor's or master's degree in an engineering or computer science field and 3 to 10 years of chip or subsystem verification experience. Hands-on skill with Verilog, SystemVerilog, UVM and assertions is required, and knowledge of memory standards such as DDR, LPDDR and HBM is preferred.

  Verilog, SystemVerilog, UVM, SystemVerilog Assertions, waveform viewers

  1 mois

  Senior ASIC Design Verification Engineer, Compute DSP/AI Processors (multiple levels)

  Markham, ON

  Sur place

  

  Qualcomm Canada ULC

  4+ ansCandidates need an engineering degree and, for senior roles, several years of ASIC design or verification experience. Strong skills in UVM, SystemVerilog, digital logic and scripting in Python or CShell are expected, along with good problem solving and communication.

  SystemVerilog, UVM, Python, CShell

• 1 mois

  ASIC Verification Engineer (7745)

  Ottawa, ON

  T

  TSMC

  5+ ansCandidates need a master's or PhD in electrical or computer engineering and 5-10 years of digital verification experience. They should be strong in SystemVerilog, UVM, assertions, Unix/Linux and EDA tools such as VCS or Incisive.

  Synopsys VCS, Cadence Incisive, UVM, Unix/Linux

• 1 mois

  Senior I/O Chiplet Verification Engineer

  Ottawa, ON

  Temps plein

  

  BTA Design Services: specializes in ASIC and FPGA design and verification services, custom IP development, embedded software, and DevOps capabilities creation.

  10+ ansCandidates need 10 or more years of hands-on ASIC verification experience through tape-out sign-off, strong SystemVerilog and UVM skills, and experience with high-speed interfaces or die-to-die interconnect. Scripting, regression automation and clear written communication are essential.

  SystemVerilog, UVM, UPF

  1 mois

  Senior FPGA Design Engineer

  Ottawa, ON

  Temps plein

  

  BTA Design Services: specializes in ASIC and FPGA design and verification services, custom IP development, embedded software, and DevOps capabilities creation.

  10+ ansCandidates need about 10 to 15 years of hands-on FPGA design experience and strong current SystemVerilog skills. They must handle clock domain crossings, configure synthesis tools, write SDC constraints, and analyze synthesis reports, and be available to work on-site in Ottawa.

  SystemVerilog, SDC

• 1 mois

  Senior Hardware Engineer

  Burnaby, BC

  108k–153k $/anTemps plein

  

  LMI Technologies

  5+ ansCandidates need a bachelor's degree in electrical engineering and at least five years designing and testing digital logic such as FPGAs or ASICs. Hands-on experience with VHDL or Verilog, high-speed interfaces and self-verifying simulation environments is required.

  Vivado, Chipscope, Logic analyzers, Oscilloscopes, Xilinx IP, Intel FPGA

• 1 mois

  FPGA Engineer

  Ottawa, ON

  105k–145k $/anTemps plein

  

  Q-Block Computing: Imagine instruments precise enough to probe this reality—to ask whether the cosmos operates according to Nature’s own algorithms.

  4+ ansCandidates need a related engineering degree, 4+ years of professional FPGA design and verification experience, and hands-on work with Vivado, Quartus or Lattice toolchains. They also need strong high-speed digital design skills and proficiency with oscilloscopes, logic analyzers and signal generators.

  Xilinx Vivado, Intel Quartus, Lattice toolchain, oscilloscope, logic analyzer, signal generator

• 1 mois

  ASIC Verification Engineer

  Ottawa, ON

  HybrideTemps plein

  N

  Nokia

  8+ ansCandidates need a Bachelor's in CS or EE and 8+ years in ASIC verification. They must know SystemVerilog, UVM, Python, assertions, functional coverage and formal verification tools.

  UVM, Python, code coverage tools, formal verification tools

• 1 mois

  SOC Development Engineer

  Vancouver, BC

  134k–201k $/anSur placeTemps plein

  

  Solidigm: Solidigm is a leading global provider of innovative NAND flash memory solutions.

  10+ ansCandidates need a bachelor's degree in electrical or computer engineering or computer science, strong debugging skills, digital logic design experience in advanced technology nodes, and verification experience with UVM or FPV. Preferred candidates have 10+ years of ASIC/SoC experience and familiarity with NVMe, PCIe, DDR or ARM standards.

  Verilog, VHDL, SystemVerilog, UVM, Jira, Confluence

• 1 mois

  Lead Digital Verification Engineer

  Mount Royal, SK

  Temps plein

  C

  Cadence

  Candidates need an engineering degree in electrical, computer or computer science, plus understanding of verification methodologies such as UVM and metric-driven verification. Strong problem-solving skills, English communication and experience with SystemVerilog assertions are required.

  SystemVerilog, UVM, Python, Perl, Ruby, Cadence tools

  1 mois

  Firmware Design Engineer

  Mount Royal, SK

  74k $/anTemps plein

  C

  Cadence

  Solide programmation en C/C++ et Python; Compréhension des principes de communication filaire; Connaissance des circuits mixtes et du traitement numérique du signal

  Firmware, Work independently, Leadership, C, C++, Python

  1 mois

  Ingénieur en conception de micrologiciel - Firmware Design Engineer

  Mount Royal, SK

  74k $/anTemps plein

  C

  Cadence

  Programmation solide en C/C++ et Python; Connaissance des communications filaires; Connaissance de la conception de circuits mixtes et du traitement numérique du signal

  Firmware, Work independently, Leadership, C, C++, Python

  1 mois

  Ingénieur en conception de micrologiciel - Firmware Design Engineer

  Mount Royal, SK

  74k $/anTemps plein

  C

  Cadence

  Programmation solide en C/C++ et Python; Connaissance des communications filaires; Connaissance de la conception de circuits mixtes et du traitement numérique du signal

  Firmware, Work independently, Leadership, C, C++, Python

  1 mois

  Lead Digital Verification Engineer

  Mount Royal, SK

  Temps plein

  C

  Cadence

  Candidates need an engineering degree in electrical, computer or computer science, plus understanding of verification methodologies such as UVM and metric-driven verification. Strong problem-solving skills, English communication and experience with SystemVerilog assertions are required.

  SystemVerilog, UVM, Python, Perl, Ruby, Cadence tools

• 1 mois

  Engineer, Digital Design Verification

  Ottawa, ON

  Temps plein

  S

  Semtech_Canada_Corporation

  2+ ansCandidates need a B.Sc. in Electrical or Computer Engineering and at least 2 years of industry experience. Semtech Canada Corporation expects knowledge of UVM-style verification, SystemVerilog, scripting in Python, TCL, Perl or C, and Linux.

  SystemVerilog, UVM, Python, TCL, Perl, Linux

  1 mois

  Senior Design/Verification Engineer

  Burlington, ON +1

  Temps plein

  S

  Semtech_Canada_Corporation

  5+ ansCandidates need a B.Sc. in Electrical or Computer Engineering and 5+ years of industry experience, with expert knowledge of constrained random verification (UVM, OVM, AVM or VMM) and SystemVerilog. Scripting skills in Python, TCL, Perl or C and working knowledge of Linux are also required.

  SystemVerilog, UVM, Python, TCL, Perl, Linux

• 1 mois

  Senior ASIC Design Verification Engineer - LPU

  Télétravail au Canada

  TélétravailTemps plein

  NC

  NVIDIA Canada Dev. Inc.

  8+ ansCandidates need a bachelor's degree in electrical engineering, computer science or computer engineering, or equivalent experience, plus 8 or more years in the industry. They need strong skills in SystemVerilog, UVM and chip design tools.

  VCS, Verdi, SystemVerilog, UVM, Perl, Python

  1 mois

  Senior ASIC Verification Engineer, Coherent High Speed Interconnect

  Toronto, ON

  Temps plein

  NC

  NVIDIA Canada Dev. Inc.

  3+ ansCandidates need a Bachelor's or Master's degree or equivalent experience, plus 3+ years of verification work. Strong SystemVerilog and UVM skills, C++ and scripting, and coherent interconnect experience are expected.

  UVM, C++, VCS, Debussy, GDB

• 1 mois

  Utility Forestry Technician

  Regina, SK

  250–300 $/jourTemps plein

  WC

  Wright Canada Holdings Ltd

  1+ ansCandidates need a forestry diploma or degree, or one or more years of utility vegetation management field experience, plus a valid Class 5 licence and a clean driving record. They must pass a drug test and communicate clearly with landowners and contractors.

  Service truck

  1 mois

  Utility Forestry Technician

  Saskatoon, SK

  250–300 $/jourTemps plein

  WC

  Wright Canada Holdings Ltd

  1+ ansCandidates need a forestry diploma or degree, or one or more years of utility vegetation management field experience, plus a valid Class 5 licence and a clean driving record. They must pass a drug test and communicate clearly with landowners and contractors.

  Service truck

  1 mois

  Utility Forestry Technician

  Prince Albert, SK

  250–300 $/jourTemps plein

  WC

  Wright Canada Holdings Ltd

  1+ ansCandidates need a forestry diploma or degree, or one or more years of utility vegetation management field experience, plus a valid Class 5 licence and a clean driving record. They must pass a drug test and communicate clearly with landowners and contractors.

  Service truck

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