AMS Design Verification Engineer
Mississauga, ONS
Synopsys
5+ ansSynopsys needs candidates with a degree in electrical or computer engineering and strong knowledge of analog and mixed-signal circuits. Candidates should know SystemVerilog and UVM, have used AMS simulation tools, and be comfortable scripting in Python, Perl or shell.
HSPICE, XA, CustomSim, VCS, SystemVerilog, UVM
Principal Analog Mixed Signal Designer - 19497
Mississauga, ONS
Synopsys
5+ ansCandidates need a PhD with 5+ years or a Master's with 8+ years of hands-on analog IC design experience. Strong CMOS skills, detailed SerDes sub-circuit design experience and SPICE simulation expertise are required.
SPICE simulators, Verilog-A, schematic entry tools, physical layout tools, MATLAB, Python