Emplois “AI EDA tools” au Canada – Page 2

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• 14j

  Software Developer - Backend (Intermediate to Senior)

  Toronto, ON

  HybrideTemps plein

  

  Xanadu: is a Canadian quantum technology company, and one of the world's leading photonic quantum hardware providers.

  3+ ansCandidates need a BSc in computer science, engineering, physics, math or a related field, and 3+ years (intermediate) or 7+ years (senior) of professional software development. They need strong Python, Go or Rust skills, PostgreSQL, API development, Docker and cloud experience, and the ability to learn new scientific domains.

  PostgreSQL, Docker, AWS, GitHub Actions, Python, Go

  14j

  Senior Analog ASIC Design Engineer

  Toronto, ON

  HybrideTemps plein

  

  Xanadu: is a Canadian quantum technology company, and one of the world's leading photonic quantum hardware providers.

  5+ ansXanadu needs 5+ years of analog or mixed-signal IC design experience, with a track record of taking designs to tested silicon. Candidates need deep experience with high-speed or high-voltage circuits, multiple process nodes, and Cadence tools, plus a Bachelor's or Master's in electrical engineering.

  Cadence

  14j

  Principal Analog ASIC Design Engineer

  Télétravail au Canada

  TélétravailTemps plein

  

  Xanadu: is a Canadian quantum technology company, and one of the world's leading photonic quantum hardware providers.

  10+ ansCandidates need 10+ years of analog or mixed-signal IC design experience, including leading complex tape-outs to silicon. They also need deep analog circuit design skills, multi-node process experience, and Cadence EDA mastery.

  Cadence

• 20j

  R&D Engineering, Staff Engineer

  Ottawa, ON

  S

  Synopsys

  7+ ansCandidates need 7-8+ years of experience with a bachelor's degree, 5-6+ with a master's, or 3-4+ with a PhD, in an engineering or computer science field. They need strong skills in CAD or simulation infrastructure, scripting in Python, Tcl or Shell, and Linux environments.

  Synopsys EDA design suite, Linux, Python, Tcl, Shell

• 20j

  Senior ASIC Design Engineer - DSP/Analog/SerDes

  Ottawa, ON

  CC

  Celero Communications, Inc.

  10+ ansCandidates need a master's or PhD in electrical or computer engineering, 10+ years of digital ASIC design, and strong Verilog or SystemVerilog skills. Knowledge of DSP, high-speed SerDes, mixed-signal or optical communications is also required.

  Verilog, SystemVerilog, Python, Tcl, MATLAB, UVM

• 22j

  Validation Lead-Fuse/SoC

  Markham, ON

  Temps plein

  AI

  AMD, Inc.

  Candidates need a bachelor's or master's in electrical or computer engineering, semiconductor and digital circuit knowledge, and silicon bring-up experience. Experience with eFuse or fuse repair, and scripting in Python, Perl or Tcl, is required.

  Python, Perl, Tcl, SQL, EDA tools, ATE platforms

  27j

  3D IC and ADVANCED PACKAGING CAD ENGINEER

  Markham, ON

  Temps plein

  AI

  AMD, Inc.

  Candidates need a computer or electrical engineering degree, experience in 3D-IC and advanced packaging, and hands-on work with Synopsys or Cadence EDA tools. Strong Python, TCL and Perl scripting on Linux, plus experience applying AI or LLMs to CAD or hardware design, are preferred.

  Synopsys 3DIC Compiler, Synopsys EDA tools, Cadence EDA tools, Verilog, UPF, Python

  27j

  Printed Circuit Board PCB Design and Layout Engineer

  Markham, ON

  Temps plein

  AI

  AMD, Inc.

  Candidates need extensive experience designing complex printed circuit boards in tools such as Cadence Allegro, Altium or Zuken, plus a Bachelor's or Master's degree in electrical or computer engineering. Strong high-speed routing and fabrication knowledge is preferred.

  Cadence Allegro, OrCAD, Altium, Zuken, PADS, ODB++

  27j

  Lead Physical Design Engineer, Place & Route

  Markham, ON

  Temps plein

  AI

  AMD, Inc.

  Candidates need deep place-and-route and physical design experience on complex, advanced-node chips, plus scripting skills in TCL, Perl or Shell. A bachelor's or master's degree in electrical, computer or a related engineering field is preferred.

  Synopsys Fusion Compiler, Cadence, Siemens EDA, TCL, Perl, Shell

  27j

  SoC Lead Engineer – LEC & Low Power Signoff

  Markham, ON

  Temps plein

  AI

  AMD, Inc.

  Candidates need proven SoC implementation and tapeout experience, in-depth LEC and low power static verification skills, and hands-on use of Formality or Conformal, VC-LP or CLP, and Design Compiler or Fusion Compiler. Verilog, VHDL, UPF, Tcl, Perl and Python skills and a BS/MS in electrical engineering or a related field are also expected.

  Synopsys Formality, Cadence Conformal, Synopsys VC-LP, Cadence Conformal Low Power, Design Compiler, Fusion Compiler

  27j

  STA/Constraints Engineer

  Vancouver, BC

  Temps plein

  AI

  AMD, Inc.

  Candidates need industry experience in STA, constraints and timing signoff, and expert use of Synopsys PrimeTime and GCA (ICC2 or Fusion Compiler desired). Scripting in Perl, TCL, Shell or Python and Verilog RTL experience are valued.

  ICC2, Verilog

  27j

  Software Engineer, AI & Engineering Productivity Tools

  Markham, ON

  Temps plein

  AI

  AMD, Inc.

  Candidates need production software experience, frontend skills in React, Angular or Vue, and database experience with PostgreSQL, MySQL or MongoDB. AMD also wants proficiency with AI-assisted development tools like Claude Code or Codex and familiarity with Linux environments.

  Claude Code, OpenAI Codex, Git, Linux

• 23j

  RTL Design Engineer - AI Tools

  Toronto, ON

  100–175 $/h

  

  Mercor

  3+ ansCandidates need 3 to 10 years of digital RTL design or design verification experience, strong Verilog, SystemVerilog and UVM skills, and solid digital design fundamentals. Experience with ASIC design flows and EDA tools is also required.

  Verilog, SystemVerilog, UVM, EDA tools

  23j

  Design Verification Engineer - Fully Remote | Upto $175/hr

  Toronto, ON

  100–175 $/h

  

  Mercor

  3+ ansCandidates need 3 to 10 years of digital RTL design or design verification experience, strong Verilog/SystemVerilog and UVM skills, and solid knowledge of digital design fundamentals. They also need ASIC design flow experience and the ability to write clear design documentation.

  Verilog, SystemVerilog, UVM, EDA tools

• 25j

  Hardware Engineer

  Markham, ON

  HybrideTemps plein

  

  NUVACORE

  5+ ansCandidates need a bachelor's degree in electrical or computer engineering and 5+ years of high-speed board design experience. They must know schematic and PCB tools, high-speed interfaces, power delivery, and hands-on lab debugging.

  Cadence Allegro, OrCAD, Concept HDL, Altium Designer, oscilloscope, logic analyzer

• 26j

  Principal Engineer, CAD

  Ottawa, ON

  

  SiTime Corporation: SiTime Corporation (Nasdaq: SITM), the market leader in silicon MEMS timing, is an analog and semiconductor company that is revolutionizing the…

  7+ ansCandidates need a BA or BS in electrical engineering, computer science or a related field and at least 7 years of CMOS IC CAD support experience. They must know Cadence, Synopsys and Siemens EDA tools, scripting languages such as SKILL, Python and Tcl, and Linux.

  Cadence Virtuoso, Spectre, Assura, Innovus, Tempus, Synopsys Design Compiler

• 26j

  Staff Design Verification Engineer

  Toronto, ON

  T

  Talentlab

  9+ ansCandidates need a Bachelor's or Master's in computer science, electrical engineering or a related field, plus at least 9 years of ASIC design verification experience. Strong SystemVerilog and UVM skills and advanced debugging are required.

  SystemVerilog, UVM, EDA tools

  26j

  Staff Physical Design Engineer

  Toronto, ON

  T

  Talentlab

  5+ ansCandidates need 5+ years of physical design experience on digital ASICs, including advanced nodes like TSMC N5, N4P or N3. They must know industry EDA tools, PnR, timing analysis and physical verification, and be strong in TCL, Python or Perl.

  Synopsys ICC2, Cadence Innovus, Calibre, PrimeTime, RedHawk, TCL

  26j

  Analog IC Design Engineer

  Toronto, ON

  T

  Talentlab

  5+ ansCandidates need an MSc or PhD in electrical engineering or a related field and 5+ years of analog IC design experience, preferably silicon-proven. They need hands-on advanced CMOS experience, SPICE and Verilog-A simulation skills, and EDA tool proficiency.

  SPICE, Verilog-A, EDA tools

• 26j

  Software Development Co-op Student (Winter 2027)

  Ottawa, ON

  21–25 $/hStage

  T

  TechInsights

  Candidates need to be enrolled in post-secondary study in Computer Science, Data Science or a related field, with hands-on software development experience. Strong communication, analytical skills and experience in an Agile environment are also needed.

  Angular, React, Infrastructure as Code, EDA tools

• 27j

  Physical Design Engineer Intern (Toronto)

  Toronto, ON

  AL

  Astera Labs Early Career - North America 2027

  Candidates need to be pursuing a bachelor's or master's degree in electrical, computer or a related engineering field. Coursework or hands-on experience with VLSI, digital logic and timing concepts, plus Unix/Linux and a scripting language such as Tcl or Python, is needed.

  Innovus, PrimeTime, Genus, Calibre, Voltus, Tcl

  27j

  DFT Engineering Intern

  Toronto, ON

  35–55 $/h

  AL

  Astera Labs Early Career - North America 2027

  Candidates need coursework or hands-on experience in electrical or computer engineering or a related field, and an understanding of digital logic and RTL. Programming in Verilog, SystemVerilog, Python, Tcl, Perl, C or C++ is needed, plus comfort in a Linux environment.

  Verilog, SystemVerilog, Python, Tcl, Perl, Linux

• 28j

  Principal Software Engineer

  Toronto, ON

  

  Questrade Financial Group: Questrade offers Canadians an easy way to invest in securities and foreign currency and provides online wealth management and mortgage through the…

  10+ ansCandidates need 10+ years of professional software engineering experience, including leading technical initiatives and solution design. They must use AI coding tools daily, have strong TypeScript skills, and know Domain-Driven Design and Event-Driven Architecture.

  Cursor, Claude, TypeScript, React, React Native, Google Cloud Platform

• 29j

  ASIC Design Engineer, Senior

  Télétravail au Canada

  TélétravailTemps plein

  

  Positron AI

  8+ ansCandidates need a BS or MS in electrical or computer engineering with 8+ years of ASIC or SoC RTL design experience. They need deep SystemVerilog skills, front-end EDA tool expertise, and hands-on work with at least three of HBM/DDR, PCIe/CXL, AMBA AXI/ACE/CHI, cache hierarchies, or high-throughput datapaths.

  SystemVerilog, Python, Tcl, Make, UVM, cocotb

12 entreprises